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authorAndre Przywara <andre.przywara@arm.com>2017-02-16 01:20:18 (GMT)
committerJagan Teki <jagan@amarulasolutions.com>2017-04-05 09:33:17 (GMT)
commit1afd0f6f17db1625a50b69a1edc40f5163db7c31 (patch)
tree3b71bb4210df00db1913e66da81155e3a3a292c0 /arch/arm/cpu/armv7/nonsec_virt.S
parent11db152246607868f0e74db958947fbf79f28119 (diff)
downloadu-boot-fsl-qoriq-1afd0f6f17db1625a50b69a1edc40f5163db7c31.tar.xz
sunxi: fix ACTLR.SMP assembly routine
If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com>
Diffstat (limited to 'arch/arm/cpu/armv7/nonsec_virt.S')
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