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| author | Simon Glass <sjg@chromium.org> | 2011-11-05 03:56:52 (GMT) |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-12-09 16:30:09 (GMT) |
| commit | 831a077f11869dfc33ca2316a4bdeba203e8ce60 (patch) | |
| tree | 0bff58fe99a6b0ac4778382b76c775cb78de48a7 /arch/arm/cpu/armv7/start.S | |
| parent | 80433c9ac6fd3bd0fe1707a04d9668db4aba1dde (diff) | |
| download | u-boot-fsl-qoriq-831a077f11869dfc33ca2316a4bdeba203e8ce60.tar.xz | |
tegra2: Enable instruction cache
Since low-level init is skipped, the instruction cache is never enabled on
Tegra2. This explicitly calls this initialization as soon as the A9 is
initialized.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/cpu/armv7/start.S')
0 files changed, 0 insertions, 0 deletions