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| author | Vikas Manocha <vikas.manocha@st.com> | 2017-05-03 22:48:25 (GMT) |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-05-12 12:19:14 (GMT) |
| commit | a0ee014f1bb0b6c6e038e11a261cb869ebb5a0f1 (patch) | |
| tree | 22cdbce71307d864b4ee1181addb4bcf23c59c3b /arch/arm/cpu | |
| parent | a292eb67021409fd6a3c2fad4bdc13effab0dfc9 (diff) | |
| download | u-boot-fsl-qoriq-a0ee014f1bb0b6c6e038e11a261cb869ebb5a0f1.tar.xz | |
armv7m: cache: add flush & invalidate all dcache
Add functionality to flush & invalidate all the dcache using the
prototype declared in common header file.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
[trini: Add dummy functions for the not-enabled case]
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/armv7m/cache.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7m/cache.c b/arch/arm/cpu/armv7m/cache.c index 162cfe3..e8f8642 100644 --- a/arch/arm/cpu/armv7m/cache.c +++ b/arch/arm/cpu/armv7m/cache.c @@ -253,6 +253,21 @@ void flush_dcache_range(unsigned long start, unsigned long stop) return; } } +void flush_dcache_all(void) +{ + if (action_dcache_all(FLUSH_SET_WAY)) { + printf("ERR: D-cache not flushed\n"); + return; + } +} + +void invalidate_dcache_all(void) +{ + if (action_dcache_all(INVALIDATE_SET_WAY)) { + printf("ERR: D-cache not invalidated\n"); + return; + } +} #else void dcache_enable(void) { @@ -268,6 +283,14 @@ int dcache_status(void) { return 0; } + +void flush_dcache_all(void) +{ +} + +void invalidate_dcache_all(void) +{ +} #endif #ifndef CONFIG_SYS_ICACHE_OFF |