diff options
| author | Heiko Stübner <heiko@sntech.de> | 2017-03-20 11:40:32 (GMT) |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2017-04-05 02:01:57 (GMT) |
| commit | f785357073be1563b2f668a1b4bb5847bfaa96f9 (patch) | |
| tree | 3050f71c59bbef34b010e6fe10bc1dcab9c14047 /arch/arm/include/asm/arch-rockchip | |
| parent | 007a43524b917a95e4d31dd606aacba9d2d58690 (diff) | |
| download | u-boot-fsl-qoriq-f785357073be1563b2f668a1b4bb5847bfaa96f9.tar.xz | |
rockchip: clk: rk3188: Allow configuration of the armclk
The armclk starts in slow mode (24MHz) on the rk3188, which makes the whole
startup take a lot of time. We therefore want to at least move to the safe
600MHz value we can use with default pmic settings.
This is also the freqency the proprietary sdram-init leaves the cpu at.
For boards that have pmic control later in u-boot, we also add the option
to set the maximum frequency of 1.6GHz, if they so desire.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/include/asm/arch-rockchip')
| -rw-r--r-- | arch/arm/include/asm/arch-rockchip/cru_rk3188.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3188.h b/arch/arm/include/asm/arch-rockchip/cru_rk3188.h index 74f0fed..f5d6420 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rk3188.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3188.h @@ -9,6 +9,7 @@ #define OSC_HZ (24 * 1000 * 1000) #define APLL_HZ (1608 * 1000000) +#define APLL_SAFE_HZ (600 * 1000000) #define GPLL_HZ (594 * 1000000) #define CPLL_HZ (384 * 1000000) |