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authorSRICHARAN R <r.sricharan@ti.com>2013-02-12 01:33:42 (GMT)
committerTom Rini <trini@ti.com>2013-03-11 15:06:10 (GMT)
commitafc2f9dcf1a4a478e51a84b1a162bca19c7b7715 (patch)
treeded3ec7c84a4306950d2b52f97989e64b852e994 /arch/arm/include/asm/omap_common.h
parenteed7c0f727cf8255b193dfefd21d66dfd6dbae94 (diff)
downloadu-boot-fsl-qoriq-afc2f9dcf1a4a478e51a84b1a162bca19c7b7715.tar.xz
ARM: OMAP5: clock: Add the prcm register changes required for ES2.0
PRCM register addresses are changed from ES1.0 to ES2.0 due to PER power domain getting moved to CORE power domain. So adding the nessecary register changes for the same. Signed-off-by: R Sricharan <r.sricharan@ti.com> Reviewed-by: Tom Rini <trini@ti.com> Cc: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch/arm/include/asm/omap_common.h')
-rw-r--r--arch/arm/include/asm/omap_common.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index 4599167..08395ca 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -44,6 +44,8 @@ struct prcm_regs {
u32 cm_div_h12_dpll_core;
u32 cm_div_h13_dpll_core;
u32 cm_div_h14_dpll_core;
+ u32 cm_div_h21_dpll_core;
+ u32 cm_div_h24_dpll_core;
u32 cm_ssc_deltamstep_dpll_core;
u32 cm_ssc_modfreqdiv_dpll_core;
u32 cm_emu_override_dpll_core;
@@ -128,6 +130,7 @@ struct prcm_regs {
u32 cm_div_m3_dpll_per;
u32 cm_div_h11_dpll_per;
u32 cm_div_h12_dpll_per;
+ u32 cm_div_h13_dpll_per;
u32 cm_div_h14_dpll_per;
u32 cm_ssc_deltamstep_dpll_per;
u32 cm_ssc_modfreqdiv_dpll_per;
@@ -474,6 +477,7 @@ struct vcores_data {
extern struct prcm_regs const **prcm;
extern struct prcm_regs const omap5_es1_prcm;
+extern struct prcm_regs const omap5_es2_prcm;
extern struct prcm_regs const omap4_prcm;
extern struct dplls const **dplls_data;
extern struct vcores_data const **omap_vcores;