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author | Tom Rini <trini@konsulko.com> | 2016-11-08 02:34:54 (GMT) |
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committer | Tom Rini <trini@konsulko.com> | 2016-11-21 19:07:29 (GMT) |
commit | 983e37007da506e8145f9b3a9e1dce5c11116fb0 (patch) | |
tree | c1d5449e1c56e17f22bb4f75b6f11336abca41a4 /arch/arm/mach-omap2/omap5/abb.c | |
parent | 272686eb7576c02df4616bcf893fde993e7ba57e (diff) | |
download | u-boot-fsl-qoriq-983e37007da506e8145f9b3a9e1dce5c11116fb0.tar.xz |
arm: Introduce arch/arm/mach-omap2 for OMAP2 derivative platforms
This moves what was in arch/arm/cpu/armv7/omap-common in to
arch/arm/mach-omap2 and moves
arch/arm/cpu/armv7/{am33xx,omap3,omap4,omap5} in to arch/arm/mach-omap2
as subdirectories. All refernces to the former locations are updated to
the current locations. For the logic to decide what our outputs are,
consolidate the tests into a single config.mk rather than including 4.
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap5/abb.c')
-rw-r--r-- | arch/arm/mach-omap2/omap5/abb.c | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap5/abb.c b/arch/arm/mach-omap2/omap5/abb.c new file mode 100644 index 0000000..3bf8897 --- /dev/null +++ b/arch/arm/mach-omap2/omap5/abb.c @@ -0,0 +1,57 @@ +/* + * Adaptive Body Bias programming sequence for OMAP5 family + * + * (C) Copyright 2013 + * Texas Instruments, <www.ti.com> + * + * Andrii Tseglytskyi <andrii.tseglytskyi@ti.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/omap_common.h> +#include <asm/io.h> + +/* + * Setup LDOVBB for OMAP5. + * On OMAP5+ some ABB settings are fused. They are handled + * in the following way: + * + * 1. corresponding EFUSE register contains ABB enable bit + * and VSET value + * 2. If ABB enable bit is set to 1, than ABB should be + * enabled, otherwise ABB should be disabled + * 3. If ABB is enabled, than VSET value should be copied + * to corresponding MUX control register + */ +s8 abb_setup_ldovbb(u32 fuse, u32 ldovbb) +{ + u32 vset; + u32 fuse_enable_mask = OMAP5_ABB_FUSE_ENABLE_MASK; + u32 fuse_vset_mask = OMAP5_ABB_FUSE_VSET_MASK; + + if (!is_omap54xx()) { + /* DRA7 */ + fuse_enable_mask = DRA7_ABB_FUSE_ENABLE_MASK; + fuse_vset_mask = DRA7_ABB_FUSE_VSET_MASK; + } + /* + * ABB parameters must be properly fused + * otherwise ABB should be disabled + */ + vset = readl(fuse); + if (!(vset & fuse_enable_mask)) + return -1; + + /* prepare VSET value for LDOVBB mux register */ + vset &= fuse_vset_mask; + vset >>= ffs(fuse_vset_mask) - 1; + vset <<= ffs(OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK) - 1; + vset |= OMAP5_ABB_LDOVBBMPU_MUX_CTRL_MASK; + + /* setup LDOVBB using fused value */ + clrsetbits_le32(ldovbb, OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK, vset); + + return 0; +} |