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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-02-26 05:21:41 (GMT) |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-02-28 18:50:16 (GMT) |
| commit | 4f19f6118478c8bbf4bd435404094b23991ad225 (patch) | |
| tree | 9c06698652d1ee3e40044d62cdd60f59437d0c9e /arch/arm/mach-s5pc1xx | |
| parent | 4021b4381d8d3c18a3d8732967eec3ec1624ab7b (diff) | |
| download | u-boot-fsl-qoriq-4f19f6118478c8bbf4bd435404094b23991ad225.tar.xz | |
ARM: uniphier: merge DDR PHY init code for 3 SoCs
Now these three are almost the same. The only difference is the DTPR1
register dependency on the DRAM size, but it can be ignored. (It has
already been ignored in PH1-sLD8 and PH1-Pro4.)
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-s5pc1xx')
0 files changed, 0 insertions, 0 deletions