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authorMasahiro Yamada <yamada.masahiro@socionext.com>2017-01-15 05:59:04 (GMT)
committerMasahiro Yamada <yamada.masahiro@socionext.com>2017-01-17 00:00:40 (GMT)
commit8d6c99c66f94c78e65fdacca2fb2857101f8a5e7 (patch)
tree5b299513f0b58bb4232181c5bab2a94f342526fb /arch/arm/mach-uniphier/memconf/Makefile
parent78c627cf1f808d5ae9240809a81b71903bdf4fe2 (diff)
downloadu-boot-fsl-qoriq-8d6c99c66f94c78e65fdacca2fb2857101f8a5e7.tar.xz
ARM: uniphier: refactor MEMCONF init code
Currently, memconf-sld3.c and memconf-pxs2.c duplicate the code. There are 3 patterns in terms of MEMCONF init: - DRAM 2 channels: LD4, sLD8, Pro4, Pro5, LD11 - DRAM 3 channels: sLD3 - DRAM 3 channels (Ch2 is disable by MEMCONF[21]): Pxs2, LD20 All of them can be moved into a single file by a little more refactoring. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-uniphier/memconf/Makefile')
-rw-r--r--arch/arm/mach-uniphier/memconf/Makefile9
1 files changed, 0 insertions, 9 deletions
diff --git a/arch/arm/mach-uniphier/memconf/Makefile b/arch/arm/mach-uniphier/memconf/Makefile
deleted file mode 100644
index 6ed1419..0000000
--- a/arch/arm/mach-uniphier/memconf/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y += memconf.o
-obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += memconf-sld3.o
-obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += memconf-pxs2.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += memconf-pxs2.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD20) += memconf-pxs2.o