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| author | Ruchika Gupta <ruchika.gupta@nxp.com> | 2017-04-17 12:37:18 (GMT) |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2017-04-17 16:03:30 (GMT) |
| commit | 762f92a60e1f02c2597500766f86e4e3fb145b21 (patch) | |
| tree | 1f8a6a3e8255e7e4f4287b15bcfd1d33b4b510c8 /arch/arm | |
| parent | 70f9661ca9130c446c146f582046024eddaaee31 (diff) | |
| download | u-boot-fsl-qoriq-762f92a60e1f02c2597500766f86e4e3fb145b21.tar.xz | |
arm: ls1043ardb: Add NAND secure boot target
Add NAND secure boot target for ls1043ardb.
- Change the u-boot size defined by a macro for copying the main
U-Boot by SPL to also include the u-boot Secure Boot header size as
header is appended to u-boot image. So header will also be copied
from SD to DDR.
- MACRO for CONFIG_BOOTSCRIPT_COPY_RAM is enabled to copy Bootscript
from NAND to DDR. Offsets for Bootscript on NAND and DDR have been
also defined.
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/include/asm/fsl_secure_boot.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index 1ca5f42..1fd09f2 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -70,7 +70,7 @@ /* Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from * Non-XIP Memory (Nand/SD)*/ #if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_FSL_LSCH3) || \ - defined(CONFIG_SD_BOOT) + defined(CONFIG_SD_BOOT) || defined(CONFIG_NAND_BOOT) #define CONFIG_BOOTSCRIPT_COPY_RAM #endif /* The address needs to be modified according to NOR, NAND, SD and @@ -96,6 +96,11 @@ #define CONFIG_BS_ADDR_DEVICE 0x00000940 #define CONFIG_BS_HDR_SIZE 0x00000010 #define CONFIG_BS_SIZE 0x00000008 +#elif defined(CONFIG_NAND_BOOT) +#define CONFIG_BS_HDR_ADDR_DEVICE 0x00800000 +#define CONFIG_BS_ADDR_DEVICE 0x00802000 +#define CONFIG_BS_HDR_SIZE 0x00002000 +#define CONFIG_BS_SIZE 0x00001000 #elif defined(CONFIG_QSPI_BOOT) #ifdef CONFIG_ARCH_LS1046A #define CONFIG_BS_HDR_ADDR_DEVICE 0x40780000 |