diff options
| author | eric.gao@rock-chips.com <eric.gao@rock-chips.com> | 2017-04-10 02:17:03 (GMT) |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2017-04-15 16:13:17 (GMT) |
| commit | b644354a7c255defe0086c15ccb6b298f27a8bcf (patch) | |
| tree | 6e4dfa9925962d835d52ed7655bfba0feee7a60b /arch/arm | |
| parent | bc8e8fe40bc57c7fe0ecafb09e180bdfefe408d5 (diff) | |
| download | u-boot-fsl-qoriq-b644354a7c255defe0086c15ccb6b298f27a8bcf.tar.xz | |
rockchip: i2c: Enable i2c for rk3399
To enable mipi display, we need to enable pmic
rk808 first for lcd3v3 power,which use i2c0 to
communicate with soc. So enable i2c0.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/dts/rk3399.dtsi | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi index dbe55f2..d94d780 100644 --- a/arch/arm/dts/rk3399.dtsi +++ b/arch/arm/dts/rk3399.dtsi @@ -26,6 +26,7 @@ serial4 = &uart4; mmc0 = &sdhci; mmc1 = &sdmmc; + i2c0 = &i2c0; }; cpus { @@ -668,6 +669,21 @@ status = "disabled"; }; + i2c0: i2c@ff3c0000 { + compatible = "rockchip,rk3399-i2c"; + reg = <0x0 0xff3c0000 0x0 0x1000>; + assigned-clocks = <&pmucru SCLK_I2C0_PMU>; + assigned-clock-rates = <200000000>; + clocks = <&pmucru SCLK_I2C0_PMU>, <&pmucru PCLK_I2C0_PMU>; + clock-names = "i2c", "pclk"; + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH 0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_xfer>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + pinctrl: pinctrl { u-boot,dm-pre-reloc; compatible = "rockchip,rk3399-pinctrl"; |