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| author | Paul Burton <paul.burton@imgtec.com> | 2015-01-29 01:27:58 (GMT) |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2015-01-29 11:55:01 (GMT) |
| commit | 4a5d8898bca3e442b61e34b811aec8332752efd3 (patch) | |
| tree | e51ad11b501325113b0d0e58756acfbcb523b111 /arch/mips/cpu/mips64/Makefile | |
| parent | 30374f98d14d5979f95a9d21d66346eaa9a795a1 (diff) | |
| download | u-boot-fsl-qoriq-4a5d8898bca3e442b61e34b811aec8332752efd3.tar.xz | |
MIPS: unify cache initialization code
The mips32 & mips64 cache initialization code differs only in that the
mips32 code supports reading the cache size from coprocessor 0 registers
at runtime. Move the more developed mips32 version to a common
arch/mips/lib/cache_init.S & remove the now-redundant mips64 version in
order to reduce duplication. The temporary registers used are shuffled
slightly in order to work for both mips32 & mips64 builds. The RA
register is defined differently to suit mips32 & mips64, but will be
removed by a later commit in the series after further cleanup.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Diffstat (limited to 'arch/mips/cpu/mips64/Makefile')
| -rw-r--r-- | arch/mips/cpu/mips64/Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/cpu/mips64/Makefile b/arch/mips/cpu/mips64/Makefile index 899c319..cb4db9c 100644 --- a/arch/mips/cpu/mips64/Makefile +++ b/arch/mips/cpu/mips64/Makefile @@ -6,4 +6,4 @@ # extra-y = start.o -obj-y = cpu.o interrupts.o time.o cache.o +obj-y = cpu.o interrupts.o time.o |