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authorSimon Glass <sjg@chromium.org>2017-04-06 18:47:05 (GMT)
committerTom Rini <trini@konsulko.com>2017-04-13 13:40:57 (GMT)
commitf1683aa73c31db0a025e0254e6ce1ee7e56aad3e (patch)
treee60233acce1fb476d8d79cecd6252d50ed456b32 /arch/mips
parent3eace37e5098c7f020a45a3672c062cd4ea199a0 (diff)
downloadu-boot-fsl-qoriq-f1683aa73c31db0a025e0254e6ce1ee7e56aad3e.tar.xz
board_f: Rename initdram() to dram_init()
This allows us to use the same DRAM init function on all archs. Add a dummy function for arc, which does not use DRAM init here. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Dummy function on nios2] Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/mach-ath79/dram.c2
-rw-r--r--arch/mips/mach-pic32/cpu.c2
-rw-r--r--arch/mips/mach-pic32/include/mach/ddr.h2
3 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/mach-ath79/dram.c b/arch/mips/mach-ath79/dram.c
index 1c73add..2706812 100644
--- a/arch/mips/mach-ath79/dram.c
+++ b/arch/mips/mach-ath79/dram.c
@@ -11,7 +11,7 @@
DECLARE_GLOBAL_DATA_PTR;
-int initdram(void)
+int dram_init(void)
{
ddr_tap_tuning();
gd->ram_size = get_ram_size((void *)KSEG1, SZ_256M);
diff --git a/arch/mips/mach-pic32/cpu.c b/arch/mips/mach-pic32/cpu.c
index c96e046..c3194f0 100644
--- a/arch/mips/mach-pic32/cpu.c
+++ b/arch/mips/mach-pic32/cpu.c
@@ -110,7 +110,7 @@ static void ddr2_pmd_ungate(void)
}
/* initialize the DDR2 Controller and DDR2 PHY */
-int initdram(void)
+int dram_init(void)
{
ddr2_pmd_ungate();
ddr2_phy_init();
diff --git a/arch/mips/mach-pic32/include/mach/ddr.h b/arch/mips/mach-pic32/include/mach/ddr.h
index 00abfa3..e7da807 100644
--- a/arch/mips/mach-pic32/include/mach/ddr.h
+++ b/arch/mips/mach-pic32/include/mach/ddr.h
@@ -8,7 +8,7 @@
#ifndef __MICROCHIP_PIC32_DDR_H
#define __MICROCHIP_PIC32_DDR_H
-/* called by initdram() function */
+/* called by dram_init() function */
void ddr2_phy_init(void);
void ddr2_ctrl_init(void);
phys_size_t ddr2_calculate_size(void);