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| author | Andy Yan <andy.yan@rock-chips.com> | 2017-07-24 09:45:27 (GMT) |
|---|---|---|
| committer | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2017-07-27 12:59:03 (GMT) |
| commit | f5868a5da119421a5274a15a049f799dd60ef49a (patch) | |
| tree | 36c8862e776d57c0fd53720958bf7490a15cdcab /arch/mips | |
| parent | f1896c45cb2f7d8dbed27e784a6459a129fc0762 (diff) | |
| download | u-boot-fsl-qoriq-f5868a5da119421a5274a15a049f799dd60ef49a.tar.xz | |
mips: spl: configure SYS_MALLOC_F_LEN independently for SPL and full U-Boot
Some platforms have very limited SRAM to run SPL code, so there may
not be the same amount space for a malloc pool before relocation in
the SPL stage as the normal U-Boot stage.
Make SPL and (the full) U-Boot stage use independent SYS_MALLOC_F_LEN,
so the size of pre-relocation malloc pool can be configured memory
space independently.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[fixed up commit-message:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/cpu/start.S | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/start.S index 952c57a..42af9de 100644 --- a/arch/mips/cpu/start.S +++ b/arch/mips/cpu/start.S @@ -60,8 +60,8 @@ sp, sp, GD_SIZE # reserve space for gd and sp, sp, t0 # force 16 byte alignment move k0, sp # save gd pointer -#ifdef CONFIG_SYS_MALLOC_F_LEN - li t2, CONFIG_SYS_MALLOC_F_LEN +#if CONFIG_VAL(SYS_MALLOC_F_LEN) + li t2, CONFIG_VAL(SYS_MALLOC_F_LEN) PTR_SUBU \ sp, sp, t2 # reserve space for early malloc and sp, sp, t0 # force 16 byte alignment @@ -75,7 +75,7 @@ blt t0, t1, 1b PTR_ADDIU t0, PTRSIZE -#ifdef CONFIG_SYS_MALLOC_F_LEN +#if CONFIG_VAL(SYS_MALLOC_F_LEN) PTR_S sp, GD_MALLOC_BASE(k0) # gd->malloc_base offset #endif .endm |