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author | Peter Tyser <ptyser@xes-inc.com> | 2010-09-15 00:13:50 (GMT) |
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committer | Wolfgang Denk <wd@denx.de> | 2010-09-23 19:14:42 (GMT) |
commit | 6aa3d3bfaa986f1aff5e21a9b9f68d087715b1a9 (patch) | |
tree | d7fa66dbe49f468f0efaa94a0ad03507b46976f6 /arch/powerpc/cpu/mpc83xx/pcie.c | |
parent | 9eda770b460161e6d6112c67cec0f46ec8d44921 (diff) | |
download | u-boot-fsl-qoriq-6aa3d3bfaa986f1aff5e21a9b9f68d087715b1a9.tar.xz |
83xx: Remove warmboot parameter from PCI init functions
This change lays the groundwork for the BOOTFLAG_* flags being removed.
This change has the small affect of delaying 100ms on PCI initialization
after a warm boot as opposed to the optimal 1ms on some boards.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
included the mpc8308_p1m board.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc83xx/pcie.c')
-rw-r--r-- | arch/powerpc/cpu/mpc83xx/pcie.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c index 09912be..1771c48 100644 --- a/arch/powerpc/cpu/mpc83xx/pcie.c +++ b/arch/powerpc/cpu/mpc83xx/pcie.c @@ -308,16 +308,16 @@ static void mpc83xx_pcie_init_bus(int bus, struct pci_region *reg) * The caller must have already set SCCR, SERDES and the PCIE_LAW BARs * must have been set to cover all of the requested regions. */ -void mpc83xx_pcie_init(int num_buses, struct pci_region **reg, int warmboot) +void mpc83xx_pcie_init(int num_buses, struct pci_region **reg) { int i; /* * Release PCI RST Output signal. * Power on to RST high must be at least 100 ms as per PCI spec. - * On warm boots only 1 ms is required. + * On warm boots only 1 ms is required, but we play it safe. */ - udelay(warmboot ? 1000 : 100000); + udelay(100000); if (num_buses > ARRAY_SIZE(mpc83xx_pcie_cfg_space)) { printf("Second PCIE host contoller not configured!\n"); |