dm: core: Replace of_offset with accessor

At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass <sjg@chromium.org>

4 files changed, 10 insertions, 10 deletions

diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c
index 6977e86..1b71d56 100644
--- a/arch/x86/cpu/broadwell/cpu.c
+++ b/arch/x86/cpu/broadwell/cpu.c
@@ -256,8 +256,8 @@ static void initialize_vr_config(struct udevice *dev)
 	/* Set the slow ramp rate */
 	msr.hi &= ~(0x3 << (53 - 32));
 	/* Configure the C-state exit ramp rate */
-	ramp = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "intel,slow-ramp",
-			      -1);
+	ramp = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
+			      "intel,slow-ramp", -1);
 	if (ramp != -1) {
 		/* Configured slow ramp rate */
 		msr.hi |= ((ramp & 0x3) << (53 - 32));
@@ -271,8 +271,8 @@ static void initialize_vr_config(struct udevice *dev)
 	}
 	/* Set MIN_VID (31:24) to allow CPU to have full control */
 	msr.lo &= ~0xff000000;
-	min_vid = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "intel,min-vid",
-				 0);
+	min_vid = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
+				 "intel,min-vid", 0);
 	msr.lo |= (min_vid & 0xff) << 24;
 	msr_write(MSR_VR_MISC_CONFIG, msr);
 
@@ -562,7 +562,7 @@ static void configure_thermal_target(struct udevice *dev)
 	int tcc_offset;
 	msr_t msr;
 
-	tcc_offset = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+	tcc_offset = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
 				    "intel,tcc-offset", 0);
 
 	/* Set TCC activaiton offset if supported */
diff --git a/arch/x86/cpu/broadwell/pch.c b/arch/x86/cpu/broadwell/pch.c
index 317f57d..16eac3d 100644
--- a/arch/x86/cpu/broadwell/pch.c
+++ b/arch/x86/cpu/broadwell/pch.c
@@ -190,14 +190,14 @@ static int pch_power_options(struct udevice *dev)
 	debug("Set power %s after power failure.\n", state);
 
 	/* GPE setup based on device tree configuration */
-	ret = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset,
+	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev),
 				   "intel,gpe0-en", enable, ARRAY_SIZE(enable));
 	if (ret)
 		return -EINVAL;
 	enable_all_gpe(enable[0], enable[1], enable[2], enable[3]);
 
 	/* SMI setup based on device tree configuration */
-	enable_alt_smi(dev, fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+	enable_alt_smi(dev, fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
 					   "intel,alt-gp-smi-enable", 0));
 
 	return 0;
diff --git a/arch/x86/cpu/broadwell/pinctrl_broadwell.c b/arch/x86/cpu/broadwell/pinctrl_broadwell.c
index 2a3fced..881413f 100644
--- a/arch/x86/cpu/broadwell/pinctrl_broadwell.c
+++ b/arch/x86/cpu/broadwell/pinctrl_broadwell.c
@@ -51,7 +51,7 @@ static int broadwell_pinctrl_read_configs(struct udevice *dev,
 	int node;
 
 	debug("%s: starting\n", __func__);
-	for (node = fdt_first_subnode(blob, dev->of_offset);
+	for (node = fdt_first_subnode(blob, dev_of_offset(dev));
 	     node > 0;
 	     node = fdt_next_subnode(blob, node)) {
 		int phandle = fdt_get_phandle(blob, node);
@@ -115,7 +115,7 @@ static int broadwell_pinctrl_read_pins(struct udevice *dev,
 	int count = 0;
 	int node;
 
-	for (node = fdt_first_subnode(blob, dev->of_offset);
+	for (node = fdt_first_subnode(blob, dev_of_offset(dev));
 	     node > 0;
 	     node = fdt_next_subnode(blob, node)) {
 		int len, i;
diff --git a/arch/x86/cpu/broadwell/sata.c b/arch/x86/cpu/broadwell/sata.c
index 2e47082..10461d9 100644
--- a/arch/x86/cpu/broadwell/sata.c
+++ b/arch/x86/cpu/broadwell/sata.c
@@ -235,7 +235,7 @@ static int broadwell_sata_ofdata_to_platdata(struct udevice *dev)
 {
 	struct sata_platdata *plat = dev_get_platdata(dev);
 	const void *blob = gd->fdt_blob;
-	int node = dev->of_offset;
+	int node = dev_of_offset(dev);
 
 	plat->port_map = fdtdec_get_int(blob, node, "intel,sata-port-map", 0);
 	plat->port0_gen3_tx = fdtdec_get_int(blob, node,