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| author | Bin Meng <bmeng.cn@gmail.com> | 2015-07-15 08:23:38 (GMT) |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-07-28 16:36:22 (GMT) |
| commit | 8ba25eec868aa40a42360397ec57f74fcaec3103 (patch) | |
| tree | 8527028fdb7090228acf5d252d18e9346b0e80ba /arch/x86/cpu/ivybridge/sdram.c | |
| parent | 3ccd49cab40603c41dd7d1ada0b971d59b93940d (diff) | |
| download | u-boot-fsl-qoriq-8ba25eec868aa40a42360397ec57f74fcaec3103.tar.xz | |
x86: Change pci option rom area MTRR setting to cacheable
Turn on cache on the pci option rom area to improve the performance.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/cpu/ivybridge/sdram.c')
0 files changed, 0 insertions, 0 deletions