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| author | Bin Meng <bmeng.cn@gmail.com> | 2015-06-17 03:15:39 (GMT) |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-07-15 00:03:16 (GMT) |
| commit | 990acd0d5165c3ca36716e01c5c182423bdfc16a (patch) | |
| tree | 398d43c090d88c1e28372dc10560c663787c03ac /arch/x86/dts/crownbay.dts | |
| parent | 63d54a67051e3e03b8a46b5442b65323d18ddb98 (diff) | |
| download | u-boot-fsl-qoriq-990acd0d5165c3ca36716e01c5c182423bdfc16a.tar.xz | |
x86: crownbay: Add MP initialization
Intel Crown Bay board has a TunnelCreek processor which supports
hyper-threading. Add /cpus node in the crownbay.dts and enable
the MP initialization.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
(modified to remove error:
overriding the value of OF_CONTROL. Old value: "y", new value: "y")
Diffstat (limited to 'arch/x86/dts/crownbay.dts')
| -rw-r--r-- | arch/x86/dts/crownbay.dts | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts index d68efda..1ec90cd 100644 --- a/arch/x86/dts/crownbay.dts +++ b/arch/x86/dts/crownbay.dts @@ -23,6 +23,26 @@ silent_console = <0>; }; + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "cpu-x86"; + reg = <0>; + intel,apic-id = <0>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "cpu-x86"; + reg = <1>; + intel,apic-id = <1>; + }; + + }; + gpioa { compatible = "intel,ich6-gpio"; u-boot,dm-pre-reloc; |