xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

1 files changed, 18 insertions, 0 deletions

diff --git a/arch/xtensa/lib/relocate.c b/arch/xtensa/lib/relocate.c
new file mode 100644
index 0000000..3f747ec
--- /dev/null
+++ b/arch/xtensa/lib/relocate.c
@@ -0,0 +1,18 @@
+/*
+ * Copyright (C) 2016 Cadence Design Systems Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <asm/relocate.h>
+#include <asm/sections.h>
+#include <asm/string.h>
+
+int clear_bss(void)
+{
+	size_t len = (size_t)&__bss_end - (size_t)&__bss_start;
+
+	memset((void *)&__bss_start, 0x00, len);
+	return 0;
+}
+