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authorSimon Glass <sjg@chromium.org>2017-05-31 23:57:22 (GMT)
committerSimon Glass <sjg@chromium.org>2017-06-09 19:39:33 (GMT)
commit1c6c7b6bd8961373a506cf7908e9fe61f6042341 (patch)
tree0b995b7d280d8c5ff7f27e36cccef94aee03b9e2 /arch
parent06cc85a29abfd0f022c51175912adff790aa2434 (diff)
downloadu-boot-fsl-qoriq-1c6c7b6bd8961373a506cf7908e9fe61f6042341.tar.xz
tegra: clock: Avoid a divide-by-zero error
The clock fix-up for tegra is still present in the code. It causes a divide-by-zero bug after relocation when chain-loading U-Boot from coreboot. Fix this by adding a check. Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: 7468676 (ARM: tegra: fix clock_get_periph_rate() for UART clocks)
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-tegra/clock.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c
index 76436d8..bac4211 100644
--- a/arch/arm/mach-tegra/clock.c
+++ b/arch/arm/mach-tegra/clock.c
@@ -339,8 +339,11 @@ unsigned long clock_get_periph_rate(enum periph_id periph_id,
* return value doesn't help. In summary this clock driver is
* quite broken but I'm afraid I have no idea how to fix it
* without completely replacing it.
+ *
+ * Be careful to avoid a divide by zero error.
*/
- div -= 2;
+ if (div >= 1)
+ div -= 2;
break;
#endif
default: