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author | Sergei Poselenov <psl@pollux.denx.de> | 2010-09-09 21:03:31 (GMT) |
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committer | Wolfgang Denk <wd@denx.de> | 2010-10-12 20:44:33 (GMT) |
commit | 9531a2388ccaeaabb33a359a0bbf2e1d792c7dde (patch) | |
tree | 7654285bb67cae16372c76f8f02d1aca1d443854 /board/a4m072/mt46v32m16.h | |
parent | 3831530dcb7b71329c272ccd6181f8038b6a6dd0 (diff) | |
download | u-boot-fsl-qoriq-9531a2388ccaeaabb33a359a0bbf2e1d792c7dde.tar.xz |
A4M072: Added support for the board.
This patch provides support for the A4M072 board with the following features:
UART
NOR flash
FEC Ethernet
External SRAM
I2C EEPROM
CompactFlash cards on IDE/ATA port
USB Host
PCI initialization
The 7-segment LED indicator is not yet supported.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Diffstat (limited to 'board/a4m072/mt46v32m16.h')
-rw-r--r-- | board/a4m072/mt46v32m16.h | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/board/a4m072/mt46v32m16.h b/board/a4m072/mt46v32m16.h new file mode 100644 index 0000000..d7561fb --- /dev/null +++ b/board/a4m072/mt46v32m16.h @@ -0,0 +1,37 @@ +/* + * (C) Copyright 2004 + * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#define SDRAM_DDR 1 /* is DDR */ + +#if defined(CONFIG_MPC5200) +/* Settings for XLB = 132 MHz */ +#define SDRAM_MODE 0x018D0000 +#define SDRAM_EMODE 0x40010000 +#define SDRAM_CONTROL 0x704f0f00 +#define SDRAM_CONFIG1 0x73722930 +#define SDRAM_CONFIG2 0x47770000 +#define SDRAM_TAPDELAY 0x10000000 + +#else +#error CONFIG_MPC5200 not defined +#endif |