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author | Shaohui Xie <Shaohui.Xie@freescale.com> | 2014-06-27 06:39:31 (GMT) |
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committer | York Sun <yorksun@freescale.com> | 2014-07-22 23:25:55 (GMT) |
commit | e55782ecccadc196a4f9d8e5e8b456e200ea9727 (patch) | |
tree | 3d4dcbee135b3765763fb876e02a6e34299502e9 /board/afeb9260 | |
parent | 3d75ec95f57224995210db5c5dea8d458cf862fb (diff) | |
download | u-boot-fsl-qoriq-e55782ecccadc196a4f9d8e5e8b456e200ea9727.tar.xz |
powerpc/t4240qds: fix offset of serdes when checking reference clock
T4240 has 4 serdes, each serdes has 4k memory space, two PLLs.
We use PLL1CR0 to check the serdes reference clock.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/afeb9260')
0 files changed, 0 insertions, 0 deletions