diff options
author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 13:01:15 (GMT) |
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committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 19:54:03 (GMT) |
commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /board/freescale/m548xevb/m548xevb.c | |
parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
download | u-boot-fsl-qoriq-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.xz |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/freescale/m548xevb/m548xevb.c')
-rw-r--r-- | board/freescale/m548xevb/m548xevb.c | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/board/freescale/m548xevb/m548xevb.c b/board/freescale/m548xevb/m548xevb.c index e6510c9..4a2a5c7 100644 --- a/board/freescale/m548xevb/m548xevb.c +++ b/board/freescale/m548xevb/m548xevb.c @@ -44,49 +44,49 @@ phys_size_t initdram(int board_type) volatile sdram_t *sdram = (volatile sdram_t *)(MMAP_SDRAM); u32 dramsize, i; - siu->drv = CFG_SDRAM_DRVSTRENGTH; + siu->drv = CONFIG_SYS_SDRAM_DRVSTRENGTH; - dramsize = CFG_DRAMSZ * 0x100000; + dramsize = CONFIG_SYS_DRAMSZ * 0x100000; for (i = 0x13; i < 0x20; i++) { if (dramsize == (1 << i)) break; } i--; - siu->cs0cfg = (CFG_SDRAM_BASE | i); + siu->cs0cfg = (CONFIG_SYS_SDRAM_BASE | i); -#ifdef CFG_DRAMSZ1 - temp = CFG_DRAMSZ1 * 0x100000; +#ifdef CONFIG_SYS_DRAMSZ1 + temp = CONFIG_SYS_DRAMSZ1 * 0x100000; for (i = 0x13; i < 0x20; i++) { if (temp == (1 << i)) break; } i--; dramsize += temp; - siu->cs1cfg = ((CFG_SDRAM_BASE + temp) | i); + siu->cs1cfg = ((CONFIG_SYS_SDRAM_BASE + temp) | i); #endif - sdram->cfg1 = CFG_SDRAM_CFG1; - sdram->cfg2 = CFG_SDRAM_CFG2; + sdram->cfg1 = CONFIG_SYS_SDRAM_CFG1; + sdram->cfg2 = CONFIG_SYS_SDRAM_CFG2; /* Issue PALL */ - sdram->ctrl = CFG_SDRAM_CTRL | 2; + sdram->ctrl = CONFIG_SYS_SDRAM_CTRL | 2; /* Issue LEMR */ - sdram->mode = CFG_SDRAM_EMOD; - sdram->mode = (CFG_SDRAM_MODE | 0x04000000); + sdram->mode = CONFIG_SYS_SDRAM_EMOD; + sdram->mode = (CONFIG_SYS_SDRAM_MODE | 0x04000000); udelay(500); /* Issue PALL */ - sdram->ctrl = (CFG_SDRAM_CTRL | 2); + sdram->ctrl = (CONFIG_SYS_SDRAM_CTRL | 2); /* Perform two refresh cycles */ - sdram->ctrl = CFG_SDRAM_CTRL | 4; - sdram->ctrl = CFG_SDRAM_CTRL | 4; + sdram->ctrl = CONFIG_SYS_SDRAM_CTRL | 4; + sdram->ctrl = CONFIG_SYS_SDRAM_CTRL | 4; - sdram->mode = CFG_SDRAM_MODE; + sdram->mode = CONFIG_SYS_SDRAM_MODE; - sdram->ctrl = (CFG_SDRAM_CTRL & ~0x80000000) | 0x10000F00; + sdram->ctrl = (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000F00; udelay(100); |