diff options
| author | Dave Liu <daveliu@freescale.com> | 2008-10-28 09:53:38 (GMT) |
|---|---|---|
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2008-12-04 04:44:48 (GMT) |
| commit | 9b0ad1b1c7a15ff674978705c7c52264978dc5d8 (patch) | |
| tree | 5f36c4042cbf9b782a025e446c56d2db8f182db4 /board/freescale/mpc8568mds | |
| parent | 2077e348c2a84901022ad95311b47b70361e6daa (diff) | |
| download | u-boot-fsl-qoriq-9b0ad1b1c7a15ff674978705c7c52264978dc5d8.tar.xz | |
85xx: remove the unused ddr_enable_ecc in the board file
The DDR controller of 8548/8544/8568/8572/8536 processors
have the ECC data init feature, and the new DDR code is
using the feature, and we don't need the way with DMA to
init memory any more.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'board/freescale/mpc8568mds')
| -rw-r--r-- | board/freescale/mpc8568mds/mpc8568mds.c | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c index 688d8c3..bc93be8 100644 --- a/board/freescale/mpc8568mds/mpc8568mds.c +++ b/board/freescale/mpc8568mds/mpc8568mds.c @@ -99,11 +99,6 @@ const qe_iop_conf_t qe_iop_conf_tab[] = { {0, 0, 0, 0, QE_IOP_TAB_END}, /* END of table */ }; - -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -extern void ddr_enable_ecc(unsigned int dram_size); -#endif - void local_bus_init(void); void sdram_init(void); @@ -170,13 +165,6 @@ initdram(int board_type) dram_size = setup_ddr_tlbs(dram_size / 0x100000); dram_size *= 0x100000; -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) - /* - * Initialize and enable DDR ECC. - */ - ddr_enable_ecc(dram_size); -#endif - /* * SDRAM Initialization */ |