diff options
author | Simon Glass <sjg@chromium.org> | 2012-12-13 20:48:48 (GMT) |
---|---|---|
committer | Tom Rini <trini@ti.com> | 2013-02-04 14:04:57 (GMT) |
commit | 67ac13b1b9b6ca00893714fbc8cbf556bab6fd59 (patch) | |
tree | 465b1934f005865689bffc75469160894bf1c361 /board/freescale/p1_p2_rdb | |
parent | c6731fe22ab1cc2f5c2b8be9b1db276d777f12c3 (diff) | |
download | u-boot-fsl-qoriq-67ac13b1b9b6ca00893714fbc8cbf556bab6fd59.tar.xz |
ppc: Move lbc_clk and cpu to arch_global_data
Move these fields into arch_global_data and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Update for bsc9132qds.c, b4860qds.c]
Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'board/freescale/p1_p2_rdb')
-rw-r--r-- | board/freescale/p1_p2_rdb/ddr.c | 2 | ||||
-rw-r--r-- | board/freescale/p1_p2_rdb/p1_p2_rdb.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/board/freescale/p1_p2_rdb/ddr.c b/board/freescale/p1_p2_rdb/ddr.c index 916439c..b16b8c8 100644 --- a/board/freescale/p1_p2_rdb/ddr.c +++ b/board/freescale/p1_p2_rdb/ddr.c @@ -202,7 +202,7 @@ phys_size_t fixed_sdram (void) struct cpu_type *cpu; ulong ddr_freq, ddr_freq_mhz; - cpu = gd->cpu; + cpu = gd->arch.cpu; /* P1020 and it's derivatives support max 32bit DDR width */ if (cpu->soc_ver == SVR_P1020 || cpu->soc_ver == SVR_P1011) { ddr_size = (CONFIG_SYS_SDRAM_SIZE * 1024 * 1024 / 2); diff --git a/board/freescale/p1_p2_rdb/p1_p2_rdb.c b/board/freescale/p1_p2_rdb/p1_p2_rdb.c index 437eaf0..9c6683d 100644 --- a/board/freescale/p1_p2_rdb/p1_p2_rdb.c +++ b/board/freescale/p1_p2_rdb/p1_p2_rdb.c @@ -108,7 +108,7 @@ int checkboard (void) else panic ("Unexpected Board REV %x detected!!\n", board_rev_gpio); - cpu = gd->cpu; + cpu = gd->arch.cpu; printf ("Board: %sRDB Rev%c\n", cpu->name, board_rev); setbits_be32(&pgpio->gpdir, GPIO_DIR); |