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| author | Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu> | 2010-01-20 07:00:11 (GMT) |
|---|---|---|
| committer | Tom Rix <Tom.Rix@windriver.com> | 2010-01-23 14:15:50 (GMT) |
| commit | a3f3897bfda9b4729785bdd328b3b7f30417a67f (patch) | |
| tree | ded9dced10adeea568982bf634b9dc7d3c00f537 /board/iphase4539 | |
| parent | 7da692360414d07027c6cf564a15d79cd9dcf488 (diff) | |
| download | u-boot-fsl-qoriq-a3f3897bfda9b4729785bdd328b3b7f30417a67f.tar.xz | |
at91: Enable slow master clock on meesc board
Normally the processor clock has a divisor of 2.
In some cases this this needs to be set to 4.
Check the user has set environment mdiv to 4 to change the divisor.
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
Diffstat (limited to 'board/iphase4539')
0 files changed, 0 insertions, 0 deletions