igep0033: Rename to igep003x

Rename igep0033 to igep003x as IGEP SMARC AM335x module (igep0034)
can use the same source files.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>

6 files changed, 0 insertions, 315 deletions

diff --git a/board/isee/igep0033/Kconfig b/board/isee/igep0033/Kconfig
deleted file mode 100644
index e989e4b..0000000
--- a/board/isee/igep0033/Kconfig
+++ /dev/null
@@ -1,15 +0,0 @@
-if TARGET_AM335X_IGEP0033
-
-config SYS_BOARD
-	default "igep0033"
-
-config SYS_VENDOR
-	default "isee"
-
-config SYS_SOC
-	default "am33xx"
-
-config SYS_CONFIG_NAME
-	default "am335x_igep0033"
-
-endif
diff --git a/board/isee/igep0033/MAINTAINERS b/board/isee/igep0033/MAINTAINERS
deleted file mode 100644
index bd8a1f2..0000000
--- a/board/isee/igep0033/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-IGEP0033 BOARD
-M:	Enric Balletbo i Serra <eballetbo@gmail.com>
-S:	Maintained
-F:	board/isee/igep0033/
-F:	include/configs/am335x_igep0033.h
-F:	configs/am335x_igep0033_defconfig
diff --git a/board/isee/igep0033/Makefile b/board/isee/igep0033/Makefile
deleted file mode 100644
index fc985b4..0000000
--- a/board/isee/igep0033/Makefile
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# Makefile
-#
-# Copyright (C) 2013, ISEE 2007 SL - http://www.isee.biz/
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-ifdef CONFIG_SPL_BUILD
-obj-y	+= mux.o
-endif
-
-obj-y	+= board.o
diff --git a/board/isee/igep0033/board.c b/board/isee/igep0033/board.c
deleted file mode 100644
index 5fea7ff..0000000
--- a/board/isee/igep0033/board.c
+++ /dev/null
@@ -1,174 +0,0 @@
-/*
- * Board functions for IGEP COM AQUILA based boards
- *
- * Copyright (C) 2013, ISEE 2007 SL - http://www.isee.biz/
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <errno.h>
-#include <spl.h>
-#include <asm/arch/cpu.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/omap.h>
-#include <asm/arch/ddr_defs.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/mmc_host_def.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/io.h>
-#include <asm/emif.h>
-#include <asm/gpio.h>
-#include <i2c.h>
-#include <miiphy.h>
-#include <cpsw.h>
-#include "board.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
-
-#ifdef CONFIG_SPL_BUILD
-static const struct ddr_data ddr3_data = {
-	.datardsratio0 = K4B2G1646EBIH9_RD_DQS,
-	.datawdsratio0 = K4B2G1646EBIH9_WR_DQS,
-	.datafwsratio0 = K4B2G1646EBIH9_PHY_FIFO_WE,
-	.datawrsratio0 = K4B2G1646EBIH9_PHY_WR_DATA,
-};
-
-static const struct cmd_control ddr3_cmd_ctrl_data = {
-	.cmd0csratio = K4B2G1646EBIH9_RATIO,
-	.cmd0iclkout = K4B2G1646EBIH9_INVERT_CLKOUT,
-
-	.cmd1csratio = K4B2G1646EBIH9_RATIO,
-	.cmd1iclkout = K4B2G1646EBIH9_INVERT_CLKOUT,
-
-	.cmd2csratio = K4B2G1646EBIH9_RATIO,
-	.cmd2iclkout = K4B2G1646EBIH9_INVERT_CLKOUT,
-};
-
-static struct emif_regs ddr3_emif_reg_data = {
-	.sdram_config = K4B2G1646EBIH9_EMIF_SDCFG,
-	.ref_ctrl = K4B2G1646EBIH9_EMIF_SDREF,
-	.sdram_tim1 = K4B2G1646EBIH9_EMIF_TIM1,
-	.sdram_tim2 = K4B2G1646EBIH9_EMIF_TIM2,
-	.sdram_tim3 = K4B2G1646EBIH9_EMIF_TIM3,
-	.zq_config = K4B2G1646EBIH9_ZQ_CFG,
-	.emif_ddr_phy_ctlr_1 = K4B2G1646EBIH9_EMIF_READ_LATENCY,
-};
-
-#define OSC    (V_OSCK/1000000)
-const struct dpll_params dpll_ddr = {
-		400, OSC-1, 1, -1, -1, -1, -1};
-
-const struct dpll_params *get_dpll_ddr_params(void)
-{
-	return &dpll_ddr;
-}
-
-void set_uart_mux_conf(void)
-{
-	enable_uart0_pin_mux();
-}
-
-void set_mux_conf_regs(void)
-{
-	enable_board_pin_mux();
-}
-
-const struct ctrl_ioregs ioregs = {
-	.cm0ioctl		= K4B2G1646EBIH9_IOCTRL_VALUE,
-	.cm1ioctl		= K4B2G1646EBIH9_IOCTRL_VALUE,
-	.cm2ioctl		= K4B2G1646EBIH9_IOCTRL_VALUE,
-	.dt0ioctl		= K4B2G1646EBIH9_IOCTRL_VALUE,
-	.dt1ioctl		= K4B2G1646EBIH9_IOCTRL_VALUE,
-};
-
-void sdram_init(void)
-{
-	config_ddr(400, &ioregs, &ddr3_data,
-		   &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0);
-}
-#endif
-
-/*
- * Basic board specific setup.  Pinmux has been handled already.
- */
-int board_init(void)
-{
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-
-	gpmc_init();
-
-	return 0;
-}
-
-#if defined(CONFIG_DRIVER_TI_CPSW)
-static void cpsw_control(int enabled)
-{
-	/* VTP can be added here */
-
-	return;
-}
-
-static struct cpsw_slave_data cpsw_slaves[] = {
-	{
-		.slave_reg_ofs	= 0x208,
-		.sliver_reg_ofs	= 0xd80,
-		.phy_addr	= 0,
-		.phy_if		= PHY_INTERFACE_MODE_RMII,
-	},
-};
-
-static struct cpsw_platform_data cpsw_data = {
-	.mdio_base		= CPSW_MDIO_BASE,
-	.cpsw_base		= CPSW_BASE,
-	.mdio_div		= 0xff,
-	.channels		= 8,
-	.cpdma_reg_ofs		= 0x800,
-	.slaves			= 1,
-	.slave_data		= cpsw_slaves,
-	.ale_reg_ofs		= 0xd00,
-	.ale_entries		= 1024,
-	.host_port_reg_ofs	= 0x108,
-	.hw_stats_reg_ofs	= 0x900,
-	.bd_ram_ofs		= 0x2000,
-	.mac_control		= (1 << 5),
-	.control		= cpsw_control,
-	.host_port_num		= 0,
-	.version		= CPSW_CTRL_VERSION_2,
-};
-
-int board_eth_init(bd_t *bis)
-{
-	int rv, ret = 0;
-	uint8_t mac_addr[6];
-	uint32_t mac_hi, mac_lo;
-
-	if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
-		/* try reading mac address from efuse */
-		mac_lo = readl(&cdev->macid0l);
-		mac_hi = readl(&cdev->macid0h);
-		mac_addr[0] = mac_hi & 0xFF;
-		mac_addr[1] = (mac_hi & 0xFF00) >> 8;
-		mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
-		mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
-		mac_addr[4] = mac_lo & 0xFF;
-		mac_addr[5] = (mac_lo & 0xFF00) >> 8;
-		if (is_valid_ethaddr(mac_addr))
-			eth_setenv_enetaddr("ethaddr", mac_addr);
-	}
-
-	writel((GMII1_SEL_RMII | RMII1_IO_CLK_EN),
-	       &cdev->miisel);
-
-	rv = cpsw_register(&cpsw_data);
-	if (rv < 0)
-		printf("Error %d registering CPSW switch\n", rv);
-	else
-		ret += rv;
-
-	return ret;
-}
-#endif
diff --git a/board/isee/igep0033/board.h b/board/isee/igep0033/board.h
deleted file mode 100644
index a11d7ab..0000000
--- a/board/isee/igep0033/board.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * IGEP COM AQUILA boards information header
- *
- * Copyright (C) 2013, ISEE 2007 SL - http://www.isee.biz/
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-/*
- * We must be able to enable uart0, for initial output. We then have a
- * main pinmux function that can be overridden to enable all other pinmux that
- * is required on the board.
- */
-void enable_uart0_pin_mux(void);
-void enable_board_pin_mux(void);
-#endif
diff --git a/board/isee/igep0033/mux.c b/board/isee/igep0033/mux.c
deleted file mode 100644
index e862776..0000000
--- a/board/isee/igep0033/mux.c
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * Copyright (C) 2013, ISEE 2007 SL - http://www.isee.biz/
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <common.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/mux.h>
-#include <asm/io.h>
-#include <i2c.h>
-#include "board.h"
-
-static struct module_pin_mux uart0_pin_mux[] = {
-	{OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* UART0_RXD */
-	{OFFSET(uart0_txd), (MODE(0) | PULLUDEN)},		/* UART0_TXD */
-	{-1},
-};
-
-static struct module_pin_mux mmc0_pin_mux[] = {
-	{OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_DAT3 */
-	{OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_DAT2 */
-	{OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_DAT1 */
-	{OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_DAT0 */
-	{OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_CLK */
-	{OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_CMD */
-	{OFFSET(mcasp0_aclkx), (MODE(4) | RXACTIVE)},		/* MMC0_CD */
-	{-1},
-};
-
-static struct module_pin_mux nand_pin_mux[] = {
-	{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD0 */
-	{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD1 */
-	{OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD2 */
-	{OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD3 */
-	{OFFSET(gpmc_ad4), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD4 */
-	{OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD5 */
-	{OFFSET(gpmc_ad6), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD6 */
-	{OFFSET(gpmc_ad7), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD7 */
-	{OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */
-	{OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN | RXACTIVE)},	/* NAND_WPN */
-	{OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)},		/* NAND_CS0 */
-	{OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)},	/* NAND_ADV_ALE */
-	{OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)},	/* NAND_OE */
-	{OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)},	/* NAND_WEN */
-	{OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)},	/* NAND_BE_CLE */
-	{-1},
-};
-
-static struct module_pin_mux rmii1_pin_mux[] = {
-	{OFFSET(mii1_txen), MODE(1)},			/* RMII1_TXEN */
-	{OFFSET(mii1_rxerr), MODE(1) | RXACTIVE},	/* RMII1_RXERR */
-	{OFFSET(mii1_crs), MODE(1) | RXACTIVE},		/* RMII1_CRS_DV */
-	{OFFSET(mii1_rxd0), MODE(1) | RXACTIVE},	/* RMII1_RXD0 */
-	{OFFSET(mii1_rxd1), MODE(1) | RXACTIVE},	/* RMII1_RXD1 */
-	{OFFSET(mii1_txd0), MODE(1)},			/* RMII1_TXD0 */
-	{OFFSET(mii1_txd1), MODE(1)},			/* RMII1_TXD1 */
-	{OFFSET(rmii1_refclk), MODE(0) | RXACTIVE},	/* RMII1_REF_CLK */
-	{OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},	/* MDIO_DATA */
-	{OFFSET(mdio_clk), MODE(0) | PULLUP_EN},	/* MDIO_CLK */
-	{-1},
-};
-
-void enable_uart0_pin_mux(void)
-{
-	configure_module_pin_mux(uart0_pin_mux);
-}
-
-/*
- * Do board-specific muxes.
- */
-void enable_board_pin_mux(void)
-{
-	/* NAND Flash */
-	configure_module_pin_mux(nand_pin_mux);
-	/* SD Card */
-	configure_module_pin_mux(mmc0_pin_mux);
-	/* Ethernet pinmux. */
-	configure_module_pin_mux(rmii1_pin_mux);
-}