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author | Tom Rini <trini@ti.com> | 2013-03-18 16:31:00 (GMT) |
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committer | Tom Rini <trini@ti.com> | 2013-03-18 18:37:18 (GMT) |
commit | 0ce033d2582129243aca10d3072a221386bbba44 (patch) | |
tree | 6e50a3f4eed22007549dc740d0fa647a6c8cec5b /board/matrix_vision/mvblx/fpga.c | |
parent | b5bec88434adb52413f1bc33fa63d7642cb8fd35 (diff) | |
parent | b27673ccbd3d5435319b5c09c3e7061f559f925d (diff) | |
download | u-boot-fsl-qoriq-0ce033d2582129243aca10d3072a221386bbba44.tar.xz |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Albert's rework of the linker scripts conflicted with Simon's making
everyone use __bss_end. We also had a minor conflict over
README.scrapyard being added to in mainline and enhanced in
u-boot-arm/master with proper formatting.
Conflicts:
arch/arm/cpu/ixp/u-boot.lds
arch/arm/cpu/u-boot.lds
arch/arm/lib/Makefile
board/actux1/u-boot.lds
board/actux2/u-boot.lds
board/actux3/u-boot.lds
board/dvlhost/u-boot.lds
board/freescale/mx31ads/u-boot.lds
doc/README.scrapyard
include/configs/tegra-common.h
Build tested for all of ARM and run-time tested on am335x_evm.
Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'board/matrix_vision/mvblx/fpga.c')
-rw-r--r-- | board/matrix_vision/mvblx/fpga.c | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/board/matrix_vision/mvblx/fpga.c b/board/matrix_vision/mvblx/fpga.c index dacc138..3fcf968 100644 --- a/board/matrix_vision/mvblx/fpga.c +++ b/board/matrix_vision/mvblx/fpga.c @@ -31,6 +31,7 @@ #include <ACEX1K.h> #include <command.h> #include <asm/gpio.h> +#include <linux/byteorder/generic.h> #include "fpga.h" #ifdef FPGA_DEBUG @@ -209,9 +210,20 @@ int fpga_wr_fn(const void *buf, size_t len, int flush, int cookie) { unsigned char *data = (unsigned char *) buf; int i; + int headerlen = len - cyclone2.size; + + if (headerlen < 0) + return FPGA_FAIL; + else if (headerlen == sizeof(uint32_t)) { + const unsigned int fpgavers_len = 11; /* '0x' + 8 hex digits + \0 */ + char fpgavers_str[fpgavers_len]; + snprintf(fpgavers_str, fpgavers_len, "0x%08x", + be32_to_cpup((uint32_t*)data)); + setenv("fpgavers", fpgavers_str); + } fpga_debug("fpga_wr: buf %p / size %d\n", buf, len); - for (i = 0; i < len; i++) + for (i = headerlen; i < len; i++) _write_fpga(data[i]); fpga_debug("-%s\n", __func__); |