ppc4xx: Convert PPC4xx UIC defines from lower case to upper case

The latest PPC4xx register cleanup patch missed the UIC defines.
This patch now changes lower case UIC defines to upper case.

Signed-off-by: Stefan Roese <sr@denx.de>

3 files changed, 35 insertions, 35 deletions

diff --git a/board/netstal/hcu4/hcu4.c b/board/netstal/hcu4/hcu4.c
index 40bec8e..ba3e9c3 100644
--- a/board/netstal/hcu4/hcu4.c
+++ b/board/netstal/hcu4/hcu4.c
@@ -58,12 +58,12 @@ int board_early_init_f (void)
 	 *      IRQ 17-24 RESERVED/UNUSED
 	 *      IRQ 31 (EXT IRQ 6) (unused)
 	 */
-	mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
-	mtdcr(uicer, 0x00000000); /* disable all ints */
-	mtdcr(uiccr, 0x00000000); /* set all to be non-critical */
-	mtdcr(uicpr, 0xFFFFE000); /* set int polarities */
-	mtdcr(uictr, 0x00000000); /* set int trigger levels */
-	mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
+	mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
+	mtdcr(UIC0ER, 0x00000000); /* disable all ints */
+	mtdcr(UIC0CR, 0x00000000); /* set all to be non-critical */
+	mtdcr(UIC0PR, 0xFFFFE000); /* set int polarities */
+	mtdcr(UIC0TR, 0x00000000); /* set int trigger levels */
+	mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
 
 	mtdcr(CPC0_CR1, CPC0_CR1_VALUE);
 	mtdcr(CPC0_ECR, 0x60606000);
diff --git a/board/netstal/hcu5/hcu5.c b/board/netstal/hcu5/hcu5.c
index 836c034..4522612 100644
--- a/board/netstal/hcu5/hcu5.c
+++ b/board/netstal/hcu5/hcu5.c
@@ -129,29 +129,29 @@ int board_early_init_f(void)
 	/*
 	 * Setup the interrupt controller polarities, triggers, etc.
 	 */
-	mtdcr(uic0sr, 0xffffffff);	/* clear all */
-	mtdcr(uic0er, 0x00000000);	/* disable all */
-	mtdcr(uic0cr, 0x00000005);	/* ATI & UIC1 crit are critical */
-	mtdcr(uic0pr, 0xfffff7ff);	/* per ref-board manual */
-	mtdcr(uic0tr, 0x00000000);	/* per ref-board manual */
-	mtdcr(uic0vr, 0x00000000);	/* int31 highest, base=0x000 */
-	mtdcr(uic0sr, 0xffffffff);	/* clear all */
-
-	mtdcr(uic1sr, 0xffffffff);	/* clear all */
-	mtdcr(uic1er, 0x00000000);	/* disable all */
-	mtdcr(uic1cr, 0x00000000);	/* all non-critical */
-	mtdcr(uic1pr, 0xffffffff);	/* per ref-board manual */
-	mtdcr(uic1tr, 0x00000000);	/* per ref-board manual */
-	mtdcr(uic1vr, 0x00000000);	/* int31 highest, base=0x000 */
-	mtdcr(uic1sr, 0xffffffff);	/* clear all */
-
-	mtdcr(uic2sr, 0xffffffff);	/* clear all */
-	mtdcr(uic2er, 0x00000000);	/* disable all */
-	mtdcr(uic2cr, 0x00000000);	/* all non-critical */
-	mtdcr(uic2pr, 0xffffffff);	/* per ref-board manual */
-	mtdcr(uic2tr, 0x00000000);	/* per ref-board manual */
-	mtdcr(uic2vr, 0x00000000);	/* int31 highest, base=0x000 */
-	mtdcr(uic2sr, 0xffffffff);	/* clear all */
+	mtdcr(UIC0SR, 0xffffffff);	/* clear all */
+	mtdcr(UIC0ER, 0x00000000);	/* disable all */
+	mtdcr(UIC0CR, 0x00000005);	/* ATI & UIC1 crit are critical */
+	mtdcr(UIC0PR, 0xfffff7ff);	/* per ref-board manual */
+	mtdcr(UIC0TR, 0x00000000);	/* per ref-board manual */
+	mtdcr(UIC0VR, 0x00000000);	/* int31 highest, base=0x000 */
+	mtdcr(UIC0SR, 0xffffffff);	/* clear all */
+
+	mtdcr(UIC1SR, 0xffffffff);	/* clear all */
+	mtdcr(UIC1ER, 0x00000000);	/* disable all */
+	mtdcr(UIC1CR, 0x00000000);	/* all non-critical */
+	mtdcr(UIC1PR, 0xffffffff);	/* per ref-board manual */
+	mtdcr(UIC1TR, 0x00000000);	/* per ref-board manual */
+	mtdcr(UIC1VR, 0x00000000);	/* int31 highest, base=0x000 */
+	mtdcr(UIC1SR, 0xffffffff);	/* clear all */
+
+	mtdcr(UIC2SR, 0xffffffff);	/* clear all */
+	mtdcr(UIC2ER, 0x00000000);	/* disable all */
+	mtdcr(UIC2CR, 0x00000000);	/* all non-critical */
+	mtdcr(UIC2PR, 0xffffffff);	/* per ref-board manual */
+	mtdcr(UIC2TR, 0x00000000);	/* per ref-board manual */
+	mtdcr(UIC2VR, 0x00000000);	/* int31 highest, base=0x000 */
+	mtdcr(UIC2SR, 0xffffffff);	/* clear all */
 	mtsdr(SDR0_PFC0, 0x00003E00);	/* Pin function:  */
 	mtsdr(SDR0_PFC1, 0x00848000);	/* Pin function: UART0 has 4 pins */
 
diff --git a/board/netstal/mcu25/mcu25.c b/board/netstal/mcu25/mcu25.c
index 9054282..945d79a 100644
--- a/board/netstal/mcu25/mcu25.c
+++ b/board/netstal/mcu25/mcu25.c
@@ -64,12 +64,12 @@ int board_early_init_f (void)
 	 *      IRQ 17-24 RESERVED/UNUSED
 	 *      IRQ 31 (EXT IRQ 6) (unused)
 	 */
-	mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
-	mtdcr(uicer, 0x00000000); /* disable all ints */
-	mtdcr(uiccr, 0x00000000); /* set all to be non-critical */
-	mtdcr(uicpr, 0xFFFFE000); /* set int polarities */
-	mtdcr(uictr, 0x00000000); /* set int trigger levels */
-	mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
+	mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
+	mtdcr(UIC0ER, 0x00000000); /* disable all ints */
+	mtdcr(UIC0CR, 0x00000000); /* set all to be non-critical */
+	mtdcr(UIC0PR, 0xFFFFE000); /* set int polarities */
+	mtdcr(UIC0TR, 0x00000000); /* set int trigger levels */
+	mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
 
 	mtdcr(CPC0_CR1, CPC0_CR1_VALUE);
 	mtdcr(CPC0_ECR, 0x60606000);