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authorKim Phillips <kim.phillips@freescale.com>2008-01-16 18:06:16 (GMT)
committerKim Phillips <kim.phillips@freescale.com>2008-01-16 18:32:39 (GMT)
commit9e89647889cd4b5ada5b5e7cad6cbe55737a08d7 (patch)
tree82be5026f963c2fb9ce66120897c0d7b3e72dc4c /board/pcippc2/config.mk
parent711a7946277d2e29af481011e8635e9975c54e45 (diff)
downloadu-boot-fsl-qoriq-9e89647889cd4b5ada5b5e7cad6cbe55737a08d7.tar.xz
mpc83xx: add support for more system clock performance controls
System registers that are modified are the Arbiter Configuration Register (ACR), the System Priority Control Register (SPCR), and the System Clock Configuration Register (SCCR). Signed-off by: Michael F. Reiss <Michael.F.Reiss@freescale.com> Signed-off by: Joe D'Abbraccio <ljd015@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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