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author | Joris van Vossen <joris.van.vossen@sintecs.nl> | 2020-01-17 09:24:44 (GMT) |
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committer | Joris van Vossen <joris.van.vossen@sintecs.nl> | 2020-01-17 12:39:03 (GMT) |
commit | 2d09eb46306dc029c7b25f3bdd1b705f9b92353c (patch) | |
tree | 362e2605ddc6782719c3787e84e9833b876694a5 /board/scalys/simc-t10xx/dragonfruit.c | |
parent | c9b89a4f8b11463e3bd8587a05ae0955e2e86c2a (diff) | |
download | u-boot-fsl-qoriq-2d09eb46306dc029c7b25f3bdd1b705f9b92353c.tar.xz |
Moved SERDES lane multiplexing configuration before PCIe initialization.
Clean-up of ddr related code and fixed a buffer overflow.
Made M speedgrade default and added support for P speedgrade with through Kconfig.
Diffstat (limited to 'board/scalys/simc-t10xx/dragonfruit.c')
-rw-r--r-- | board/scalys/simc-t10xx/dragonfruit.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/board/scalys/simc-t10xx/dragonfruit.c b/board/scalys/simc-t10xx/dragonfruit.c index 12accc0..6c0a15f 100644 --- a/board/scalys/simc-t10xx/dragonfruit.c +++ b/board/scalys/simc-t10xx/dragonfruit.c @@ -1,5 +1,5 @@ /* - * Copyright 2017 Scalys B.V. + * Copyright 2020 Scalys B.V. * opensource@scalys.com * * SPDX-License-Identifier: GPL-2.0+ @@ -150,8 +150,8 @@ int scalys_carrier_setup_muxing(int serdes_config) printf("Serdes lane configuration:\n"); if ((mux_config & 1) != 0) { gpio_direction_output(MUX_SER0_1_SEL, 1); - printf("A: SFP slot 0 (T2081 only)\n"); - printf("B: SFP slot 1 (T2081 only)\n"); + printf("A: SFP+ slot 0 (T2081 only)\n"); + printf("B: SFP+ slot 1 (T2081 only)\n"); } else { gpio_direction_output(MUX_SER0_1_SEL, 0); printf("A: PCIe slot 1 on lane 0\n"); |