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| author | Joris van Vossen <joris.van.vossen@sintecs.nl> | 2020-01-17 09:24:44 (GMT) |
|---|---|---|
| committer | Joris van Vossen <joris.van.vossen@sintecs.nl> | 2020-01-17 12:39:03 (GMT) |
| commit | 2d09eb46306dc029c7b25f3bdd1b705f9b92353c (patch) | |
| tree | 362e2605ddc6782719c3787e84e9833b876694a5 /board/scalys/simc-t10xx/spl.c | |
| parent | c9b89a4f8b11463e3bd8587a05ae0955e2e86c2a (diff) | |
| download | u-boot-fsl-qoriq-2d09eb46306dc029c7b25f3bdd1b705f9b92353c.tar.xz | |
Moved SERDES lane multiplexing configuration before PCIe initialization.
Clean-up of ddr related code and fixed a buffer overflow.
Made M speedgrade default and added support for P speedgrade with through Kconfig.
Diffstat (limited to 'board/scalys/simc-t10xx/spl.c')
| -rw-r--r-- | board/scalys/simc-t10xx/spl.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/board/scalys/simc-t10xx/spl.c b/board/scalys/simc-t10xx/spl.c index cfb6e04..07e8393 100644 --- a/board/scalys/simc-t10xx/spl.c +++ b/board/scalys/simc-t10xx/spl.c @@ -107,6 +107,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) get_clocks(); mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, CONFIG_SPL_RELOC_MALLOC_SIZE); + gd->flags |= GD_FLG_FULL_MALLOC_INIT; gd->env_addr = (ulong)(CONFIG_ENV_ADDR); gd->env_valid = 1; |