diff options
author | wdenk <wdenk> | 2003-06-19 23:01:32 (GMT) |
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committer | wdenk <wdenk> | 2003-06-19 23:01:32 (GMT) |
commit | 48b42616e928ce6eacfe20276a1614e2b27ac4b5 (patch) | |
tree | 0c194fbd1059185f158c0b37dc3c846b50c2ee2f /board/smdk2410 | |
parent | 15ef8a5d17181ea376fac94579dce0af1cfcdeb7 (diff) | |
download | u-boot-fsl-qoriq-48b42616e928ce6eacfe20276a1614e2b27ac4b5.tar.xz |
* Patches by David Müller, 12 Jun 2003:
- rewrite of the S3C24X0 register definitions stuff
- "driver" for the built-in S3C24X0 RTC
* Patches by Yuli Barcohen, 12 Jun 2003:
- Add MII support and Ethernet PHY initialization for MPC8260ADS board
- Fix incorrect SIUMCR initialisation caused by wrong Hard Reset
configuration word supplied by FPGA on some MPC8260ADS boards
* Patch by Pantelis Antoniou, 10 Jun 2003:
Unify status LED interface
Diffstat (limited to 'board/smdk2410')
-rw-r--r-- | board/smdk2410/config.mk | 4 | ||||
-rw-r--r-- | board/smdk2410/smdk2410.c | 38 |
2 files changed, 22 insertions, 20 deletions
diff --git a/board/smdk2410/config.mk b/board/smdk2410/config.mk index b06b493..1af85da 100644 --- a/board/smdk2410/config.mk +++ b/board/smdk2410/config.mk @@ -16,10 +16,10 @@ # Linux-Kernel is expected to be at 3000'8000, entry 3000'8000 # optionally with a ramdisk at 3080'0000 # -# we load ourself to 33F0'0000 +# we load ourself to 33F8'0000 # # download area is 3300'0000 # -TEXT_BASE = 0x33F00000 +TEXT_BASE = 0x33F80000 diff --git a/board/smdk2410/smdk2410.c b/board/smdk2410/smdk2410.c index 7f983ef..207cd44 100644 --- a/board/smdk2410/smdk2410.c +++ b/board/smdk2410/smdk2410.c @@ -68,38 +68,40 @@ static inline void delay (unsigned long loops) int board_init (void) { DECLARE_GLOBAL_DATA_PTR; + S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER(); + S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO(); /* to reduce PLL lock time, adjust the LOCKTIME register */ - rLOCKTIME = 0xFFFFFF; + clk_power->LOCKTIME = 0xFFFFFF; /* configure MPLL */ - rMPLLCON = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV); + clk_power->MPLLCON = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV); /* some delay between MPLL and UPLL */ delay (4000); /* configure UPLL */ - rUPLLCON = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV); + clk_power->UPLLCON = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV); /* some delay between MPLL and UPLL */ delay (8000); /* set up the I/O ports */ - rGPACON = 0x007FFFFF; - rGPBCON = 0x00044555; - rGPBUP = 0x000007FF; - rGPCCON = 0xAAAAAAAA; - rGPCUP = 0x0000FFFF; - rGPDCON = 0xAAAAAAAA; - rGPDUP = 0x0000FFFF; - rGPECON = 0xAAAAAAAA; - rGPEUP = 0x0000FFFF; - rGPFCON = 0x000055AA; - rGPFUP = 0x000000FF; - rGPGCON = 0xFF95FFBA; - rGPGUP = 0x0000FFFF; - rGPHCON = 0x002AFAAA; - rGPHUP = 0x000007FF; + gpio->GPACON = 0x007FFFFF; + gpio->GPBCON = 0x00044555; + gpio->GPBUP = 0x000007FF; + gpio->GPCCON = 0xAAAAAAAA; + gpio->GPCUP = 0x0000FFFF; + gpio->GPDCON = 0xAAAAAAAA; + gpio->GPDUP = 0x0000FFFF; + gpio->GPECON = 0xAAAAAAAA; + gpio->GPEUP = 0x0000FFFF; + gpio->GPFCON = 0x000055AA; + gpio->GPFUP = 0x000000FF; + gpio->GPGCON = 0xFF95FFBA; + gpio->GPGUP = 0x0000FFFF; + gpio->GPHCON = 0x002AFAAA; + gpio->GPHUP = 0x000007FF; /* arch number of SMDK2410-Board */ gd->bd->bi_arch_number = 193; |