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| author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2014-07-28 08:12:45 (GMT) |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2014-07-28 08:12:45 (GMT) |
| commit | 740f41d3cbefe2068247852220226c2c3b287249 (patch) | |
| tree | a8afb3f0e3f0b7d4574cbbfd2e8d780db6b4ae08 /board/sunxi/gmac.c | |
| parent | f2c8d7f591e28d3437155c7a6eae8c8d9e3fe552 (diff) | |
| parent | 7c48b015100eeff0e1bbb766394f7beca23afb48 (diff) | |
| download | u-boot-fsl-qoriq-740f41d3cbefe2068247852220226c2c3b287249.tar.xz | |
Merge branch 'u-boot-sunxi/master' into 'u-boot-arm/master'
Diffstat (limited to 'board/sunxi/gmac.c')
| -rw-r--r-- | board/sunxi/gmac.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/board/sunxi/gmac.c b/board/sunxi/gmac.c index e48328d..e7ff952 100644 --- a/board/sunxi/gmac.c +++ b/board/sunxi/gmac.c @@ -16,17 +16,28 @@ int sunxi_gmac_initialize(bd_t *bis) setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC); /* Set MII clock */ +#ifdef CONFIG_RGMII setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII | CCM_GMAC_CTRL_GPIT_RGMII); +#else + setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_MII | + CCM_GMAC_CTRL_GPIT_MII); +#endif /* Configure pin mux settings for GMAC */ for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(16); pin++) { +#ifdef CONFIG_RGMII /* skip unused pins in RGMII mode */ if (pin == SUNXI_GPA(9) || pin == SUNXI_GPA(14)) continue; +#endif sunxi_gpio_set_cfgpin(pin, SUN7I_GPA0_GMAC); sunxi_gpio_set_drv(pin, 3); } +#ifdef CONFIG_RGMII return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_RGMII); +#else + return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_MII); +#endif } |