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author | Lokesh Vutla <lokeshvutla@ti.com> | 2013-12-10 09:32:21 (GMT) |
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committer | Tom Rini <trini@ti.com> | 2013-12-19 02:14:18 (GMT) |
commit | 965de8b91bddd1f5967240d1d44005719b09dd5e (patch) | |
tree | dbcbdffdaaf14e8ace3eb1a911f27ace0352bbc6 /board/ti | |
parent | cf04d0326bd1e24909cfe644c0c8676440a915b1 (diff) | |
download | u-boot-fsl-qoriq-965de8b91bddd1f5967240d1d44005719b09dd5e.tar.xz |
ARM: AM33xx+: Update ioregs to pass different values
Currently same value is programmed for all ioregs. This is not
the case for all SoC's like AM4372. So adding a structure for ioregs
and updating in all board files. And also return from config_cmd_ctrl()
and config_ddr_data() functions if data is not passed.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Fixup dxr2, cm_t335, adapt pcm051 rev3]
Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'board/ti')
-rw-r--r-- | board/ti/am335x/board.c | 40 | ||||
-rw-r--r-- | board/ti/ti814x/evm.c | 4 | ||||
-rw-r--r-- | board/ti/ti816x/evm.c | 12 |
3 files changed, 46 insertions, 10 deletions
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index 33693e4..5721768 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -426,6 +426,38 @@ void set_mux_conf_regs(void) enable_board_pin_mux(&header); } +const struct ctrl_ioregs ioregs_evmsk = { + .cm0ioctl = MT41J128MJT125_IOCTRL_VALUE, + .cm1ioctl = MT41J128MJT125_IOCTRL_VALUE, + .cm2ioctl = MT41J128MJT125_IOCTRL_VALUE, + .dt0ioctl = MT41J128MJT125_IOCTRL_VALUE, + .dt1ioctl = MT41J128MJT125_IOCTRL_VALUE, +}; + +const struct ctrl_ioregs ioregs_bonelt = { + .cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE, + .cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE, + .cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE, + .dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE, + .dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE, +}; + +const struct ctrl_ioregs ioregs_evm15 = { + .cm0ioctl = MT41J512M8RH125_IOCTRL_VALUE, + .cm1ioctl = MT41J512M8RH125_IOCTRL_VALUE, + .cm2ioctl = MT41J512M8RH125_IOCTRL_VALUE, + .dt0ioctl = MT41J512M8RH125_IOCTRL_VALUE, + .dt1ioctl = MT41J512M8RH125_IOCTRL_VALUE, +}; + +const struct ctrl_ioregs ioregs = { + .cm0ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .cm1ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .cm2ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .dt0ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .dt1ioctl = MT47H128M16RT25E_IOCTRL_VALUE, +}; + void sdram_init(void) { __maybe_unused struct am335x_baseboard_id header; @@ -443,18 +475,18 @@ void sdram_init(void) } if (board_is_evm_sk(&header)) - config_ddr(303, MT41J128MJT125_IOCTRL_VALUE, &ddr3_data, + config_ddr(303, &ioregs_evmsk, &ddr3_data, &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0); else if (board_is_bone_lt(&header)) - config_ddr(400, MT41K256M16HA125E_IOCTRL_VALUE, + config_ddr(400, &ioregs_bonelt, &ddr3_beagleblack_data, &ddr3_beagleblack_cmd_ctrl_data, &ddr3_beagleblack_emif_reg_data, 0); else if (board_is_evm_15_or_later(&header)) - config_ddr(303, MT41J512M8RH125_IOCTRL_VALUE, &ddr3_evm_data, + config_ddr(303, &ioregs_evm15, &ddr3_evm_data, &ddr3_evm_cmd_ctrl_data, &ddr3_evm_emif_reg_data, 0); else - config_ddr(266, MT47H128M16RT25E_IOCTRL_VALUE, &ddr2_data, + config_ddr(266, &ioregs, &ddr2_data, &ddr2_cmd_ctrl_data, &ddr2_emif_reg_data, 0); } #endif diff --git a/board/ti/ti814x/evm.c b/board/ti/ti814x/evm.c index 0b76a77..140ad71 100644 --- a/board/ti/ti814x/evm.c +++ b/board/ti/ti814x/evm.c @@ -95,9 +95,9 @@ void sdram_init(void) { config_dmm(&evm_lisa_map_regs); - config_ddr(0, 0, &evm_ddr2_data, &evm_ddr2_cctrl_data, + config_ddr(0, NULL, &evm_ddr2_data, &evm_ddr2_cctrl_data, &evm_ddr2_emif0_regs, 0); - config_ddr(0, 0, &evm_ddr2_data, &evm_ddr2_cctrl_data, + config_ddr(0, NULL, &evm_ddr2_data, &evm_ddr2_cctrl_data, &evm_ddr2_emif1_regs, 1); } #endif diff --git a/board/ti/ti816x/evm.c b/board/ti/ti816x/evm.c index a53859e..b6bf162 100644 --- a/board/ti/ti816x/evm.c +++ b/board/ti/ti816x/evm.c @@ -191,22 +191,26 @@ void sdram_init(void) if (CONFIG_TI816X_USE_EMIF0) { ddr2_emif0_regs.emif_ddr_phy_ctlr_1 = (get_cpu_rev() == 0x1 ? 0x0000010B : 0x0000030B); - config_ddr(0, 0, &ddr2_data, &ddr2_ctrl, &ddr2_emif0_regs, 0); + config_ddr(0, NULL, &ddr2_data, &ddr2_ctrl, &ddr2_emif0_regs, + 0); } if (CONFIG_TI816X_USE_EMIF1) { ddr2_emif1_regs.emif_ddr_phy_ctlr_1 = (get_cpu_rev() == 0x1 ? 0x0000010B : 0x0000030B); - config_ddr(1, 0, &ddr2_data, &ddr2_ctrl, &ddr2_emif1_regs, 1); + config_ddr(1, NULL, &ddr2_data, &ddr2_ctrl, &ddr2_emif1_regs, + 1); } #endif #ifdef CONFIG_TI816X_EVM_DDR3 if (CONFIG_TI816X_USE_EMIF0) - config_ddr(0, 0, &ddr3_data, &ddr3_ctrl, &ddr3_emif0_regs, 0); + config_ddr(0, NULL, &ddr3_data, &ddr3_ctrl, &ddr3_emif0_regs, + 0); if (CONFIG_TI816X_USE_EMIF1) - config_ddr(1, 0, &ddr3_data, &ddr3_ctrl, &ddr3_emif1_regs, 1); + config_ddr(1, NULL, &ddr3_data, &ddr3_ctrl, &ddr3_emif1_regs, + 1); #endif } #endif /* CONFIG_SPL_BUILD */ |