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| author | York Sun <yorksun@freescale.com> | 2014-06-26 18:14:44 (GMT) |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-07-22 23:25:55 (GMT) |
| commit | 3d75ec95f57224995210db5c5dea8d458cf862fb (patch) | |
| tree | 4ad21c2e982302743b1d220ae669eef3a26fbb18 /board | |
| parent | de5191631088e71ba8ed28bb491dafa776058008 (diff) | |
| download | u-boot-fsl-qoriq-3d75ec95f57224995210db5c5dea8d458cf862fb.tar.xz | |
driver/ddr: Fix DDR register timing_cfg_8
The field wrtord_bg should add 2 clocks if on the fly chop is enabled,
according to DDR controller manual for DDR4.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board')
0 files changed, 0 insertions, 0 deletions