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author | Stefano Babic <sbabic@denx.de> | 2014-05-15 08:27:32 (GMT) |
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committer | Stefano Babic <sbabic@denx.de> | 2014-05-15 08:27:32 (GMT) |
commit | e7f9350525d73233d4eaf1793f8fe618e9fd4910 (patch) | |
tree | 153366c61e17af4ecdd9f10be520f707d525157d /common/ddr_spd.c | |
parent | 50c8d66d33651d7fca6a082a1eea6e537401a2f4 (diff) | |
parent | d2a3e911390f9fc4d8c0ee4b3c7fc75f4fd3fd19 (diff) | |
download | u-boot-fsl-qoriq-e7f9350525d73233d4eaf1793f8fe618e9fd4910.tar.xz |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'common/ddr_spd.c')
-rw-r--r-- | common/ddr_spd.c | 45 |
1 files changed, 44 insertions, 1 deletions
diff --git a/common/ddr_spd.c b/common/ddr_spd.c index 7a388bb..438e71a 100644 --- a/common/ddr_spd.c +++ b/common/ddr_spd.c @@ -1,5 +1,5 @@ /* - * Copyright 2008 Freescale Semiconductor, Inc. + * Copyright 2008-2014 Freescale Semiconductor, Inc. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -116,3 +116,46 @@ ddr3_spd_check(const ddr3_spd_eeprom_t *spd) return 1; } } + +unsigned int ddr4_spd_check(const struct ddr4_spd_eeprom_s *spd) +{ + char *p = (char *)spd; + int csum16; + int len; + char crc_lsb; /* byte 126 */ + char crc_msb; /* byte 127 */ + + len = 126; + csum16 = crc16(p, len); + + crc_lsb = (char) (csum16 & 0xff); + crc_msb = (char) (csum16 >> 8); + + if (spd->crc[0] != crc_lsb || spd->crc[1] != crc_msb) { + printf("SPD checksum unexpected.\n" + "Checksum lsb in SPD = %02X, computed SPD = %02X\n" + "Checksum msb in SPD = %02X, computed SPD = %02X\n", + spd->crc[0], crc_lsb, spd->crc[1], crc_msb); + return 1; + } + + p = (char *)((ulong)spd + 128); + len = 126; + csum16 = crc16(p, len); + + crc_lsb = (char) (csum16 & 0xff); + crc_msb = (char) (csum16 >> 8); + + if (spd->mod_section.uc[126] != crc_lsb || + spd->mod_section.uc[127] != crc_msb) { + printf("SPD checksum unexpected.\n" + "Checksum lsb in SPD = %02X, computed SPD = %02X\n" + "Checksum msb in SPD = %02X, computed SPD = %02X\n", + spd->mod_section.uc[126], + crc_lsb, spd->mod_section.uc[127], + crc_msb); + return 1; + } + + return 0; +} |