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authorRoger Quadros <rogerq@ti.com>2016-08-24 12:35:50 (GMT)
committerJoe Hershberger <joe.hershberger@ni.com>2016-10-13 17:25:06 (GMT)
commite607ec993b65462eff960fd5f28016db6b0a61bd (patch)
treebeccd0757835103006011f4fc23ce34c157b5be8 /configs/M54455EVB_intel_defconfig
parentab9715303d0b32e9a71dfa9c43d6629f54e2f236 (diff)
downloadu-boot-fsl-qoriq-e607ec993b65462eff960fd5f28016db6b0a61bd.tar.xz
board: am335x-icev2: add ethernet phy mode detection logic
Both ethernet ports can be used as CPSW ethernet (RMII mode) or PRU ethernet (MII mode) by setting the jumper near the port. Read the jumper value and set the pinmux, external mux and PHY clock accordingly. As jumper line is overridden by PHY RX_DV pin immediately after bootstrap (power-up/reset), we have to use GPIO edge detection to capture the jumper line status. As u-boot doesn't provide any infrastructure for GPIO edge detection, we directly access the GPIO registers. Signed-off-by: Roger Quadros <rogerq@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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