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author | Simon Glass <sjg@chromium.org> | 2015-08-30 22:55:42 (GMT) |
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committer | Simon Glass <sjg@chromium.org> | 2015-09-03 03:28:24 (GMT) |
commit | e2e947ff6ba676e5ba84639fe6f2766aa683e181 (patch) | |
tree | a05098289b30d2e15ff18f3ae7fbd7811bc5ba99 /configs/chromebook_jerry_defconfig | |
parent | 17aa548cedd9a4c063590d29ac27160dc67f47f9 (diff) | |
download | u-boot-fsl-qoriq-e2e947ff6ba676e5ba84639fe6f2766aa683e181.tar.xz |
rockchip: Add basic support for jerry
This builds and displays an SPL message, but does not function beyond that.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'configs/chromebook_jerry_defconfig')
-rw-r--r-- | configs/chromebook_jerry_defconfig | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig new file mode 100644 index 0000000..389dfd2 --- /dev/null +++ b/configs/chromebook_jerry_defconfig @@ -0,0 +1,43 @@ +CONFIG_ARM=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_ROCKCHIP_RK3288=y +CONFIG_TARGET_CHROMEBOOK_JERRY=y +CONFIG_DEFAULT_DEVICE_TREE="rk3288-jerry" +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_ADDR=0x80000 +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_REGMAP=y +CONFIG_SYSCON=y +CONFIG_RESET=y +CONFIG_LED=y +CONFIG_SPL_LED=y +CONFIG_LED_GPIO=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_BASE=0xff690000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_SIMPLE=y +CONFIG_SPL_PINCTRL=y +CONFIG_SPL_PINCTRL_SIMPLE=y +CONFIG_ROCKCHIP_PINCTRL=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_ACT8846=y +CONFIG_DM_REGULATOR=y +CONFIG_REGULATOR_ACT8846=y +CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_DM_MMC=y +CONFIG_ROCKCHIP_DWMMC=y +CONFIG_USE_PRIVATE_LIBGCC=y +CONFIG_CMD_DHRYSTONE=y +CONFIG_ERRNO_STR=y |