rename CFG_ macros to CONFIG_SYS

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

5 files changed, 62 insertions, 62 deletions

diff --git a/cpu/mcf523x/cpu.c b/cpu/mcf523x/cpu.c
index bdc152f..1ce90fd 100644
--- a/cpu/mcf523x/cpu.c
+++ b/cpu/mcf523x/cpu.c
@@ -98,7 +98,7 @@ int watchdog_init(void)
 	u32 wdog_module = 0;
 
 	/* set timeout and enable watchdog */
-	wdog_module = ((CFG_CLK / CFG_HZ) * CONFIG_WATCHDOG_TIMEOUT);
+	wdog_module = ((CONFIG_SYS_CLK / CONFIG_SYS_HZ) * CONFIG_WATCHDOG_TIMEOUT);
 	wdog_module |= (wdog_module / 8192);
 	wdp->mr = wdog_module;
 
diff --git a/cpu/mcf523x/cpu_init.c b/cpu/mcf523x/cpu_init.c
index 8ab5b8e..6520944 100644
--- a/cpu/mcf523x/cpu_init.c
+++ b/cpu/mcf523x/cpu_init.c
@@ -49,69 +49,69 @@ void cpu_init_f(void)
 	wdog->cr = 0;
 #endif
 
-	scm->rambar = (CFG_INIT_RAM_ADDR | SCM_RAMBAR_BDE);
+	scm->rambar = (CONFIG_SYS_INIT_RAM_ADDR | SCM_RAMBAR_BDE);
 
 	/* Port configuration */
 	gpio->par_cs = 0;
 
-#if (defined(CFG_CS0_BASE) && defined(CFG_CS0_MASK) && defined(CFG_CS0_CTRL))
-	fbcs->csar0 = CFG_CS0_BASE;
-	fbcs->cscr0 = CFG_CS0_CTRL;
-	fbcs->csmr0 = CFG_CS0_MASK;
+#if (defined(CONFIG_SYS_CS0_BASE) && defined(CONFIG_SYS_CS0_MASK) && defined(CONFIG_SYS_CS0_CTRL))
+	fbcs->csar0 = CONFIG_SYS_CS0_BASE;
+	fbcs->cscr0 = CONFIG_SYS_CS0_CTRL;
+	fbcs->csmr0 = CONFIG_SYS_CS0_MASK;
 #endif
 
-#if (defined(CFG_CS1_BASE) && defined(CFG_CS1_MASK) && defined(CFG_CS1_CTRL))
+#if (defined(CONFIG_SYS_CS1_BASE) && defined(CONFIG_SYS_CS1_MASK) && defined(CONFIG_SYS_CS1_CTRL))
 	gpio->par_cs |= GPIO_PAR_CS_CS1;
-	fbcs->csar1 = CFG_CS1_BASE;
-	fbcs->cscr1 = CFG_CS1_CTRL;
-	fbcs->csmr1 = CFG_CS1_MASK;
+	fbcs->csar1 = CONFIG_SYS_CS1_BASE;
+	fbcs->cscr1 = CONFIG_SYS_CS1_CTRL;
+	fbcs->csmr1 = CONFIG_SYS_CS1_MASK;
 #endif
 
-#if (defined(CFG_CS2_BASE) && defined(CFG_CS2_MASK) && defined(CFG_CS2_CTRL))
+#if (defined(CONFIG_SYS_CS2_BASE) && defined(CONFIG_SYS_CS2_MASK) && defined(CONFIG_SYS_CS2_CTRL))
 	gpio->par_cs |= GPIO_PAR_CS_CS2;
-	fbcs->csar2 = CFG_CS2_BASE;
-	fbcs->cscr2 = CFG_CS2_CTRL;
-	fbcs->csmr2 = CFG_CS2_MASK;
+	fbcs->csar2 = CONFIG_SYS_CS2_BASE;
+	fbcs->cscr2 = CONFIG_SYS_CS2_CTRL;
+	fbcs->csmr2 = CONFIG_SYS_CS2_MASK;
 #endif
 
-#if (defined(CFG_CS3_BASE) && defined(CFG_CS3_MASK) && defined(CFG_CS3_CTRL))
+#if (defined(CONFIG_SYS_CS3_BASE) && defined(CONFIG_SYS_CS3_MASK) && defined(CONFIG_SYS_CS3_CTRL))
 	gpio->par_cs |= GPIO_PAR_CS_CS3;
-	fbcs->csar3 = CFG_CS3_BASE;
-	fbcs->cscr3 = CFG_CS3_CTRL;
-	fbcs->csmr3 = CFG_CS3_MASK;
+	fbcs->csar3 = CONFIG_SYS_CS3_BASE;
+	fbcs->cscr3 = CONFIG_SYS_CS3_CTRL;
+	fbcs->csmr3 = CONFIG_SYS_CS3_MASK;
 #endif
 
-#if (defined(CFG_CS4_BASE) && defined(CFG_CS4_MASK) && defined(CFG_CS4_CTRL))
+#if (defined(CONFIG_SYS_CS4_BASE) && defined(CONFIG_SYS_CS4_MASK) && defined(CONFIG_SYS_CS4_CTRL))
 	gpio->par_cs |= GPIO_PAR_CS_CS4;
-	fbcs->csar4 = CFG_CS4_BASE;
-	fbcs->cscr4 = CFG_CS4_CTRL;
-	fbcs->csmr4 = CFG_CS4_MASK;
+	fbcs->csar4 = CONFIG_SYS_CS4_BASE;
+	fbcs->cscr4 = CONFIG_SYS_CS4_CTRL;
+	fbcs->csmr4 = CONFIG_SYS_CS4_MASK;
 #endif
 
-#if (defined(CFG_CS5_BASE) && defined(CFG_CS5_MASK) && defined(CFG_CS5_CTRL))
+#if (defined(CONFIG_SYS_CS5_BASE) && defined(CONFIG_SYS_CS5_MASK) && defined(CONFIG_SYS_CS5_CTRL))
 	gpio->par_cs |= GPIO_PAR_CS_CS5;
-	fbcs->csar5 = CFG_CS5_BASE;
-	fbcs->cscr5 = CFG_CS5_CTRL;
-	fbcs->csmr5 = CFG_CS5_MASK;
+	fbcs->csar5 = CONFIG_SYS_CS5_BASE;
+	fbcs->cscr5 = CONFIG_SYS_CS5_CTRL;
+	fbcs->csmr5 = CONFIG_SYS_CS5_MASK;
 #endif
 
-#if (defined(CFG_CS6_BASE) && defined(CFG_CS6_MASK) && defined(CFG_CS6_CTRL))
+#if (defined(CONFIG_SYS_CS6_BASE) && defined(CONFIG_SYS_CS6_MASK) && defined(CONFIG_SYS_CS6_CTRL))
 	gpio->par_cs |= GPIO_PAR_CS_CS6;
-	fbcs->csar6 = CFG_CS6_BASE;
-	fbcs->cscr6 = CFG_CS6_CTRL;
-	fbcs->csmr6 = CFG_CS6_MASK;
+	fbcs->csar6 = CONFIG_SYS_CS6_BASE;
+	fbcs->cscr6 = CONFIG_SYS_CS6_CTRL;
+	fbcs->csmr6 = CONFIG_SYS_CS6_MASK;
 #endif
 
-#if (defined(CFG_CS7_BASE) && defined(CFG_CS7_MASK) && defined(CFG_CS7_CTRL))
+#if (defined(CONFIG_SYS_CS7_BASE) && defined(CONFIG_SYS_CS7_MASK) && defined(CONFIG_SYS_CS7_CTRL))
 	gpio->par_cs |= GPIO_PAR_CS_CS7;
-	fbcs->csar7 = CFG_CS7_BASE;
-	fbcs->cscr7 = CFG_CS7_CTRL;
-	fbcs->csmr7 = CFG_CS7_MASK;
+	fbcs->csar7 = CONFIG_SYS_CS7_BASE;
+	fbcs->cscr7 = CONFIG_SYS_CS7_CTRL;
+	fbcs->csmr7 = CONFIG_SYS_CS7_MASK;
 #endif
 
 #ifdef CONFIG_FSL_I2C
-	CFG_I2C_PINMUX_REG &= CFG_I2C_PINMUX_CLR;
-	CFG_I2C_PINMUX_REG |= CFG_I2C_PINMUX_SET;
+	CONFIG_SYS_I2C_PINMUX_REG &= CONFIG_SYS_I2C_PINMUX_CLR;
+	CONFIG_SYS_I2C_PINMUX_REG |= CONFIG_SYS_I2C_PINMUX_SET;
 #endif
 
 	icache_enable();
@@ -130,7 +130,7 @@ void uart_port_conf(void)
 	volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
 
 	/* Setup Ports: */
-	switch (CFG_UART_PORT) {
+	switch (CONFIG_SYS_UART_PORT) {
 	case 0:
 		gpio->par_uart = (GPIO_PAR_UART_U0RXD | GPIO_PAR_UART_U0TXD);
 		break;
diff --git a/cpu/mcf523x/interrupts.c b/cpu/mcf523x/interrupts.c
index 125c53b..db5ccdf 100644
--- a/cpu/mcf523x/interrupts.c
+++ b/cpu/mcf523x/interrupts.c
@@ -28,7 +28,7 @@
 
 int interrupt_init(void)
 {
-	volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE);
+	volatile int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
 
 	/* Make sure all interrupts are disabled */
 	intp->imrl0 |= 0x1;
@@ -40,10 +40,10 @@ int interrupt_init(void)
 #if defined(CONFIG_MCFTMR)
 void dtimer_intr_setup(void)
 {
-	volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE);
+	volatile int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
 
-	intp->icr0[CFG_TMRINTR_NO] = CFG_TMRINTR_PRI;
+	intp->icr0[CONFIG_SYS_TMRINTR_NO] = CONFIG_SYS_TMRINTR_PRI;
 	intp->imrl0 &= ~INTC_IPRL_INT0;
-	intp->imrl0 &= ~CFG_TMRINTR_MASK;
+	intp->imrl0 &= ~CONFIG_SYS_TMRINTR_MASK;
 }
 #endif
diff --git a/cpu/mcf523x/speed.c b/cpu/mcf523x/speed.c
index 1bda2d4..6096ba4 100644
--- a/cpu/mcf523x/speed.c
+++ b/cpu/mcf523x/speed.c
@@ -42,7 +42,7 @@ int get_clocks(void)
 
 	while (!(pll->synsr & PLL_SYNSR_LOCK));
 
-	gd->bus_clk = CFG_CLK;
+	gd->bus_clk = CONFIG_SYS_CLK;
 	gd->cpu_clk = (gd->bus_clk * 2);
 
 #ifdef CONFIG_FSL_I2C
diff --git a/cpu/mcf523x/start.S b/cpu/mcf523x/start.S
index 2b638df..b70b83b 100644
--- a/cpu/mcf523x/start.S
+++ b/cpu/mcf523x/start.S
@@ -127,10 +127,10 @@ _start:
 	move.w #0x2700,%sr	/* Mask off Interrupt */
 
 	/* Set vector base register at the beginning of the Flash */
-	move.l	#CFG_FLASH_BASE, %d0
+	move.l	#CONFIG_SYS_FLASH_BASE, %d0
 	movec	%d0, %VBR
 
-	move.l	#(CFG_INIT_RAM_ADDR + CFG_INIT_RAM_CTRL), %d0
+	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
 	movec	%d0, %RAMBAR1
 
 	/* invalidate and disable cache */
@@ -143,14 +143,14 @@ _start:
 
 	/* initialize general use internal ram */
 	move.l #0, %d0
-	move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
-	move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-4), %a2
+	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
+	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a2
 	move.l %d0, (%a1)
 	move.l %d0, (%a2)
 
 	/* set stackpointer to end of internal ram to get some stackspace for the
 	   first c-code */
-	move.l	#(CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET), %sp
+	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
 	clr.l %sp@-
 
 	move.l #__got_start, %a5	/* put relocation table address to a5 */
@@ -181,7 +181,7 @@ relocate_code:
 	move.l 12(%a6), %d0		/* Save copy of Global Data pointer */
 	move.l 16(%a6), %a0		/* Save copy of Destination Address */
 
-	move.l #CFG_MONITOR_BASE, %a1
+	move.l #CONFIG_SYS_MONITOR_BASE, %a1
 	move.l #__init_end, %a2
 	move.l %a0, %a3
 
@@ -196,7 +196,7 @@ relocate_code:
  * initialization, now running from RAM.
  */
 	move.l	%a0, %a1
-	add.l	#(in_ram - CFG_MONITOR_BASE), %a1
+	add.l	#(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
 	jmp	(%a1)
 
 in_ram:
@@ -206,9 +206,9 @@ clear_bss:
 	 * Now clear BSS segment
 	 */
 	move.l	%a0, %a1
-	add.l	#(_sbss - CFG_MONITOR_BASE),%a1
+	add.l	#(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
 	move.l	%a0, %d1
-	add.l	#(_ebss - CFG_MONITOR_BASE),%d1
+	add.l	#(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
 6:
 	clr.l	(%a1)+
 	cmp.l	%a1,%d1
@@ -218,11 +218,11 @@ clear_bss:
 	 * fix got table in RAM
 	 */
 	move.l	%a0, %a1
-	add.l	#(__got_start - CFG_MONITOR_BASE),%a1
+	add.l	#(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
 	move.l	%a1,%a5		/* * fix got pointer register a5 */
 
 	move.l	%a0, %a2
-	add.l	#(__got_end - CFG_MONITOR_BASE),%a2
+	add.l	#(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
 
 7:
 	move.l	(%a1),%d1
@@ -234,7 +234,7 @@ clear_bss:
 
 	/* calculate relative jump to board_init_r in ram */
 	move.l %a0, %a1
-	add.l #(board_init_r - CFG_MONITOR_BASE), %a1
+	add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
 
 	/* set parameters for board_init_r */
 	move.l %a0,-(%sp)		/* dest_addr */
@@ -270,16 +270,16 @@ icache_enable:
 	move.l	#0x01000000, %d0		/* Invalidate cache cmd */
 	movec	%d0, %CACR			/* Invalidate cache */
 	nop
-	move.l	#(CFG_SDRAM_BASE + 0xc000), %d0	/* Setup cache mask */
+	move.l	#(CONFIG_SYS_SDRAM_BASE + 0xc000), %d0	/* Setup cache mask */
 	movec	%d0, %ACR0			/* Enable cache */
-	move.l	#(CFG_FLASH_BASE + 0xc000), %d0	/* Setup cache mask */
+	move.l	#(CONFIG_SYS_FLASH_BASE + 0xc000), %d0	/* Setup cache mask */
 	movec	%d0, %ACR1			/* Enable cache */
 
 	move.l	#0x80400100, %d0		/* Setup cache mask */
 	movec	%d0, %CACR			/* Enable cache */
 	nop
 
-	move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
+	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
 	moveq	#1, %d0
 	move.l	%d0, (%a1)
 	rts
@@ -292,14 +292,14 @@ icache_disable:
 	movec	%d0, %ACR0
 	movec	%d0, %ACR1
 
-	move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
+	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
 	moveq	#0, %d0
 	move.l	%d0, (%a1)
 	rts
 
 	.globl	icache_status
 icache_status:
-	move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
+	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
 	move.l	(%a1), %d0
 	rts
 
@@ -312,7 +312,7 @@ icache_invalid:
 
 	.globl	dcache_enable
 dcache_enable:
-	move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-4), %a1
+	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
 	moveq	#1, %d0
 	move.l	%d0, (%a1)
 	rts
@@ -320,14 +320,14 @@ dcache_enable:
     /* No dcache, just a dummy function */
 	.globl	dcache_disable
 dcache_disable:
-	move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-4), %a1
+	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
 	moveq	#0, %d0
 	move.l	%d0, (%a1)
 	rts
 
 	.globl	dcache_status
 dcache_status:
-	move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-4), %a1
+	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
 	move.l	(%a1), %d0
 	rts