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author | Sergei Poselenov <sposelenov@emcraft.com> | 2008-05-08 12:17:08 (GMT) |
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committer | Wolfgang Denk <wd@denx.de> | 2008-05-20 21:27:50 (GMT) |
commit | 793670c3c0f0f72caead62f0be9fc3d9fbc6060f (patch) | |
tree | 1f799a653f56ba1889e98e86839c43181bcc37e2 /cpu/mpc85xx | |
parent | e18575d5f589a62e19c70d471d4b4e27cad3af56 (diff) | |
download | u-boot-fsl-qoriq-793670c3c0f0f72caead62f0be9fc3d9fbc6060f.tar.xz |
Fixed reset for socrates
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Diffstat (limited to 'cpu/mpc85xx')
-rw-r--r-- | cpu/mpc85xx/cpu.c | 23 |
1 files changed, 14 insertions, 9 deletions
diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 74b210c..9873383 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -174,28 +174,33 @@ int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) { uint pvr; uint ver; + unsigned long val, msr; + pvr = get_pvr(); ver = PVR_VER(pvr); + if (ver & 1){ /* e500 v2 core has reset control register */ volatile unsigned int * rstcr; rstcr = (volatile unsigned int *)(CFG_IMMR + 0xE00B0); *rstcr = 0x2; /* HRESET_REQ */ - }else{ + udelay(100); + } + /* + * Fallthrough if the code above failed * Initiate hard reset in debug control register DBCR0 * Make sure MSR[DE] = 1 */ - unsigned long val, msr; - msr = mfmsr (); - msr |= MSR_DE; - mtmsr (msr); + msr = mfmsr (); + msr |= MSR_DE; + mtmsr (msr); + + val = mfspr(DBCR0); + val |= 0x70000000; + mtspr(DBCR0,val); - val = mfspr(DBCR0); - val |= 0x70000000; - mtspr(DBCR0,val); - } return 1; } |