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| author | Patrice Chotard <patrice.chotard@st.com> | 2017-07-18 15:37:27 (GMT) |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-07-26 15:29:15 (GMT) |
| commit | f303aaf21b968ab959edcc354892f9eca8907e0b (patch) | |
| tree | 9116053595de57030e108158f5ceba95ac76bfb6 /doc/README.Heterogeneous-SoCs | |
| parent | f39b90dc8c2b6da6665fa4c7dcd47d32cbe07a29 (diff) | |
| download | u-boot-fsl-qoriq-f303aaf21b968ab959edcc354892f9eca8907e0b.tar.xz | |
ram: stm32: add second SDRAM bank management
FMC is able to manage 2 SDRAM banks, but the current driver
implementation is only able to manage the first SDRAM bank.
Even if only bank2 is used, some bank1 registers must be
configured.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'doc/README.Heterogeneous-SoCs')
0 files changed, 0 insertions, 0 deletions