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author | Steve Sakoman <sakoman@gmail.com> | 2011-09-30 09:08:36 (GMT) |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-10-27 19:56:34 (GMT) |
commit | 353ffa7f93ab90655af2b194b7d0d16f106c297c (patch) | |
tree | 2da82ab19b593cf6999371014917ae585c3f96a7 /doc/README.timll | |
parent | 14aa545c45f3f6d487c83b4fc3be19dd9f9e4e5b (diff) | |
download | u-boot-fsl-qoriq-353ffa7f93ab90655af2b194b7d0d16f106c297c.tar.xz |
omap: overo: Disable pull-ups on camera PCLK, HS and VS signals
The level shifters used on the Caspa camera module have a 4k output
impedance. Combined with the 100uA pull-up resistors in the OMAP3,
this raises the ground level to 400mV. Adding crosstalk between the
pixel clock and the HS/VS signals on the flat cable (a ground line in
between would have been nice), logic 0 levels can raise up to 650mV.
This exceeds the camera input pins VIL maximum voltage. This change
suggested-by Laurent Pinchart
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'doc/README.timll')
0 files changed, 0 insertions, 0 deletions