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| author | Wenyou Yang <wenyou.yang@atmel.com> | 2016-04-11 08:41:33 (GMT) |
|---|---|---|
| committer | Andreas Bießmann <andreas@biessmann.org> | 2016-05-24 06:08:37 (GMT) |
| commit | c043d8d8ce8bf1c1946c87a89b6639db3ebb4243 (patch) | |
| tree | e0c5e9d8f9b45ca6c2dc1d7dead327bc63a040cb /doc/README.trace | |
| parent | 7a91e1a3835413aac3e7c894ca1ba205e6ade887 (diff) | |
| download | u-boot-fsl-qoriq-c043d8d8ce8bf1c1946c87a89b6639db3ebb4243.tar.xz | |
board: sama5d2_xplained: change SDHCI GCK's clock source to UPLL
Change the clock source of the SDHCI's generated clock from PLLA to
UPLL clock to align to Linux driver.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
Diffstat (limited to 'doc/README.trace')
0 files changed, 0 insertions, 0 deletions