diff options
| author | Vikas Manocha <vikas.manocha@st.com> | 2017-02-12 18:25:48 (GMT) |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-03-17 18:15:14 (GMT) |
| commit | b5be8f5ea8d9b0ffc46f818ce0cb38cd16f99e4d (patch) | |
| tree | 97556c8a9b47ea996828a6f82be552ecc54fd08e /drivers/clk/clk_stm32f7.c | |
| parent | 84bfdc17b54198a869ad91341c26eec5f9c96169 (diff) | |
| download | u-boot-fsl-qoriq-b5be8f5ea8d9b0ffc46f818ce0cb38cd16f99e4d.tar.xz | |
stm32f7: clk: remove usart1 clock enable from board init
Before clock driver availability it was required to enable usart1 clock
for serial init but now with clock driver is taking care of usart1 clock.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Diffstat (limited to 'drivers/clk/clk_stm32f7.c')
| -rw-r--r-- | drivers/clk/clk_stm32f7.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/clk/clk_stm32f7.c b/drivers/clk/clk_stm32f7.c index 4c5388a..0d86395 100644 --- a/drivers/clk/clk_stm32f7.c +++ b/drivers/clk/clk_stm32f7.c @@ -228,9 +228,6 @@ static int stm32_clk_enable(struct clk *clk) void clock_setup(int peripheral) { switch (peripheral) { - case USART1_CLOCK_CFG: - setbits_le32(&STM32_RCC->apb2enr, RCC_APB2ENR_USART1EN); - break; case GPIO_A_CLOCK_CFG: setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_GPIO_A_EN); break; |