Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

* 'master' of git://git.denx.de/u-boot-mpc85xx:
  powerpc/p3060: Add SoC related support for P3060 platform
  powerpc/85xx: Add support for setting up RAID engine liodns on P5020
  powerpc/85xx: Refactor some defines out of corenet_ds.h
  fm-eth: Add ability for board code to disable a port
  powerpc/mpc8548: Add workaround for erratum NMG_LBC103
  powerpc/mpc8548: Add workaround for erratum NMG_DDR120
  powerpc/mpc85xxcds: Fix PCI speed
  powerpc/mpc8548cds: Fix booting message
  powerpc/p4080: Add support for secure boot flow
  powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH
  powerpc/85xx: Add PBL & SECUREBOOT support on P3041/P5020DS boards
  powerpc/p2041rdb: remove watch dog related codes
  powerpc/p2041rdb: updated description of cpld command
  powerpc/p2041rdb: add more ddr frequencies support
  powerpc/p2041rdb: set sysclk according to status of physical switch SW1
  powerpc/p2041rdb: update cpld reset command according to CPLD 2.0
  powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driver
  powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver
  powerpc/mpc8xxx: Add DDR2 to unified DDR driver
  powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps()
  powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots
  powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en
  powerpc/85xx: Refactor P2041RDB to use common p_corenet files
  powerpc/85xx: refactor common P-Series CoreNet files for FSL boards
  powerpc/85xx: Enable CMD_REGINFO on corenet boards
  powerpc/85xx: p2041rdb - Remove unused 'execute' perm in TLB entries
  powerpc/85xx: Fix USB protocol definitions for P1020RDB
  powerpc/corenet_ds: Use separated speed tables for UDIMM and RDIMM
  powerpc/mpc8xxx: Move DDR RCW overriding to common code
  powerpc/mpc8xxx: Extend CWL table
  powerpc/85xx: Cleanup how SVR_MAJ() is defined on MPC8536
  powerpc/85xx: Cleanup extern in corenet_ds board code
  powerpc/p2041rdb: Add ethernet support on P2041RDB board
  powerpc/85xx: Add networking support to P1023RDS
  powerpc/hydra: Add ethernet support on P5020/P3041 DS boards
  powerpc/85xx: Add FMan ethernet support to P4080DS
  powerpc/85xx: Add support for FMan ethernet in Independent mode
  powerpc/mpc8548cds: Cleanup mpc8548cds.c
  powerpc/mp: add support for discontiguous cores
  powerpc/85xx: corenet_ds - Remove unused 'execute' perm in TLB entries
  fdt: Add new fdt_create_phandle helper
  fdt: Rename fdt_create_phandle to fdt_set_phandle
  powerpc/85xx: Fix compile warnings/errors if CONFIG_SYS_DPAA_FMAN isn't set
  fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010)
  powerpc/P1010: Add workaround for erratum P1010-A003549 (related to IFC)
  fsl_ifc: Add the workaround for erratum IFC-A002769 (enable on P1010)
  powerpc/85xx: Expanding the window of CCSRBAR in AS=1 from 4k to 1M
  powerpc/85xx: Add NAND/NAND_SPL support to P1010RDB
  nand: Freescale Integrated Flash Controller NAND support
  powerpc/85xx: Add basic support for P1010RDB
  powerpc/85xx: Add support for new P102x/P2020 RDB style boards
  powerpc/85xx: relocate CCSR before creating the initial RAM area
  powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros
  powerpc/85xx: Enable internal USB UTMI PHY on p204x/p3041/p50x0
  powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014

1 files changed, 216 insertions, 0 deletions

diff --git a/drivers/net/fm/init.c b/drivers/net/fm/init.c
new file mode 100644
index 0000000..512d7dd
--- /dev/null
+++ b/drivers/net/fm/init.c
@@ -0,0 +1,216 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+#include <asm/io.h>
+#include <asm/fsl_serdes.h>
+
+#include "fm.h"
+
+struct fm_eth_info fm_info[] = {
+#if (CONFIG_SYS_NUM_FM1_DTSEC >= 1)
+	FM_DTSEC_INFO_INITIALIZER(1, 1),
+#endif
+#if (CONFIG_SYS_NUM_FM1_DTSEC >= 2)
+	FM_DTSEC_INFO_INITIALIZER(1, 2),
+#endif
+#if (CONFIG_SYS_NUM_FM1_DTSEC >= 3)
+	FM_DTSEC_INFO_INITIALIZER(1, 3),
+#endif
+#if (CONFIG_SYS_NUM_FM1_DTSEC >= 4)
+	FM_DTSEC_INFO_INITIALIZER(1, 4),
+#endif
+#if (CONFIG_SYS_NUM_FM1_DTSEC >= 5)
+	FM_DTSEC_INFO_INITIALIZER(1, 5),
+#endif
+#if (CONFIG_SYS_NUM_FM2_DTSEC >= 1)
+	FM_DTSEC_INFO_INITIALIZER(2, 1),
+#endif
+#if (CONFIG_SYS_NUM_FM2_DTSEC >= 2)
+	FM_DTSEC_INFO_INITIALIZER(2, 2),
+#endif
+#if (CONFIG_SYS_NUM_FM2_DTSEC >= 3)
+	FM_DTSEC_INFO_INITIALIZER(2, 3),
+#endif
+#if (CONFIG_SYS_NUM_FM2_DTSEC >= 4)
+	FM_DTSEC_INFO_INITIALIZER(2, 4),
+#endif
+#if (CONFIG_SYS_NUM_FM1_10GEC >= 1)
+	FM_TGEC_INFO_INITIALIZER(1, 1),
+#endif
+#if (CONFIG_SYS_NUM_FM2_10GEC >= 1)
+	FM_TGEC_INFO_INITIALIZER(2, 1),
+#endif
+};
+
+int fm_standard_init(bd_t *bis)
+{
+	int i;
+	struct ccsr_fman *reg;
+
+	reg = (void *)CONFIG_SYS_FSL_FM1_ADDR;
+	if (fm_init_common(0, reg))
+		return 0;
+
+	for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
+		if ((fm_info[i].enabled) && (fm_info[i].index == 1))
+			fm_eth_initialize(reg, &fm_info[i]);
+	}
+
+#if (CONFIG_SYS_NUM_FMAN == 2)
+	reg = (void *)CONFIG_SYS_FSL_FM2_ADDR;
+	if (fm_init_common(1, reg))
+		return 0;
+
+	for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
+		if ((fm_info[i].enabled) && (fm_info[i].index == 2))
+			fm_eth_initialize(reg, &fm_info[i]);
+	}
+#endif
+
+	return 1;
+}
+
+/* simple linear search to map from port to array index */
+static int fm_port_to_index(enum fm_port port)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
+		if (fm_info[i].port == port)
+			return i;
+	}
+
+	return -1;
+}
+
+/*
+ * Determine if an interface is actually active based on HW config
+ * we expect fman_port_enet_if() to report PHY_INTERFACE_MODE_NONE if
+ * the interface is not active based on HW cfg of the SoC
+ */
+void fman_enet_init(void)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
+		phy_interface_t enet_if;
+
+		enet_if = fman_port_enet_if(fm_info[i].port);
+		if (enet_if != PHY_INTERFACE_MODE_NONE) {
+			fm_info[i].enabled = 1;
+			fm_info[i].enet_if = enet_if;
+		} else {
+			fm_info[i].enabled = 0;
+		}
+	}
+
+	return ;
+}
+
+void fm_disable_port(enum fm_port port)
+{
+	int i = fm_port_to_index(port);
+
+	fm_info[i].enabled = 0;
+	fman_disable_port(port);
+}
+
+void fm_info_set_mdio(enum fm_port port, struct mii_dev *bus)
+{
+	int i = fm_port_to_index(port);
+
+	if (i == -1)
+		return;
+
+	fm_info[i].bus = bus;
+}
+
+void fm_info_set_phy_address(enum fm_port port, int address)
+{
+	int i = fm_port_to_index(port);
+
+	if (i == -1)
+		return;
+
+	fm_info[i].phy_addr = address;
+}
+
+/*
+ * Returns the type of the data interface between the given MAC and its PHY.
+ * This is typically determined by the RCW.
+ */
+phy_interface_t fm_info_get_enet_if(enum fm_port port)
+{
+	int i = fm_port_to_index(port);
+
+	if (i == -1)
+		return PHY_INTERFACE_MODE_NONE;
+
+	if (fm_info[i].enabled)
+		return fm_info[i].enet_if;
+
+	return PHY_INTERFACE_MODE_NONE;
+}
+
+static void
+__def_board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa,
+				enum fm_port port, int offset)
+{
+	return ;
+}
+
+void board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa,
+				enum fm_port port, int offset)
+	 __attribute__((weak, alias("__def_board_ft_fman_fixup_port")));
+
+static void ft_fixup_port(void *blob, struct fm_eth_info *info, char *prop)
+{
+	int off, ph;
+	phys_addr_t paddr = CONFIG_SYS_CCSRBAR_PHYS + info->compat_offset;
+
+	off = fdt_node_offset_by_compat_reg(blob, prop, paddr);
+
+	if (info->enabled) {
+		fdt_fixup_phy_connection(blob, off, info->enet_if);
+		board_ft_fman_fixup_port(blob, prop, paddr, info->port, off);
+		return ;
+	}
+
+	/* board code might have caused offset to change */
+	off = fdt_node_offset_by_compat_reg(blob, prop, paddr);
+
+	/* disable both the mac node and the node that has a handle to it */
+	fdt_setprop_string(blob, off, "status", "disabled");
+
+	ph = fdt_get_phandle(blob, off);
+	do_fixup_by_prop(blob, "fsl,fman-mac", &ph, sizeof(ph),
+		"status", "disabled", strlen("disabled") + 1, 1);
+}
+
+void fdt_fixup_fman_ethernet(void *blob)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
+		if (fm_info[i].type == FM_ETH_1G_E)
+			ft_fixup_port(blob, &fm_info[i], "fsl,fman-1g-mac");
+		else
+			ft_fixup_port(blob, &fm_info[i], "fsl,fman-10g-mac");
+	}
+}