diff options
| author | Prafulla Wadaskar <prafulla@marvell.com> | 2009-07-16 15:28:02 (GMT) |
|---|---|---|
| committer | Ben Warren <biggerbadderben@gmail.com> | 2009-07-23 05:53:45 (GMT) |
| commit | 443ce4ac9d1138ae5ae6863b2d40a96fd6edf523 (patch) | |
| tree | 8331ff5381208ea52251216a18a43b28a3549d07 /drivers/net/phy/mv88e61xx.h | |
| parent | 16025ea45539219f2a7c750c6f0ae983ea5c2737 (diff) | |
| download | u-boot-fsl-qoriq-443ce4ac9d1138ae5ae6863b2d40a96fd6edf523.tar.xz | |
net: phy: bugfixes: mv88E61xx multichip addressing support
With these fixes, this driver works properly for multi chip
addressging mode
Bugfixes:
1. Build error fixed for function mv88e61xx_busychk_multic-fixed
2. PHY dev address error detection- fixed
3. wrong busy bit was refered in function mv88e61xx_busychk -fixed
4. invalid data read ptr was refered for RD_PHY in case of
multichip addressing mode -fixed
The Multichip Address mode is tested with RD6281A board having
MV88E6165 switch on it
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Diffstat (limited to 'drivers/net/phy/mv88e61xx.h')
| -rw-r--r-- | drivers/net/phy/mv88e61xx.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/phy/mv88e61xx.h b/drivers/net/phy/mv88e61xx.h index 4279464..57762b6 100644 --- a/drivers/net/phy/mv88e61xx.h +++ b/drivers/net/phy/mv88e61xx.h @@ -49,7 +49,7 @@ #define MV88E61XX_ADDR_OFST 5 #ifdef CONFIG_MV88E61XX_MULTICHIP_ADRMODE -static int mv88e61xx_busychk_multic(u32 devaddr); +static int mv88e61xx_busychk_multic(char *name, u32 devaddr); static void mv88e61xx_wr_phy(char *name, u32 phy_adr, u32 reg_ofs, u16 data); static void mv88e61xx_rd_phy(char *name, u32 phy_adr, u32 reg_ofs, u16 * data); #define WR_PHY mv88e61xx_wr_phy |