diff options
| author | Kishon Vijay Abraham I <kishon@ti.com> | 2015-02-23 13:10:13 (GMT) |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2015-04-14 03:48:10 (GMT) |
| commit | 526a50f8ec300194aa168e07d7dee6f32902d06d (patch) | |
| tree | 64bf35f59e2b6954dc87e370c84897b1bd04a8a2 /drivers/usb/dwc3/ep0.c | |
| parent | 6900aeda528bdeeeb44bde6433ff928506e30d6f (diff) | |
| download | u-boot-fsl-qoriq-526a50f8ec300194aa168e07d7dee6f32902d06d.tar.xz | |
dwc3: flush the buffers before using it
In the linux kernel, non cacheable buffers are used. However in uboot
since there are no APIs to allocate non cacheable memory, all
the buffers should be flushed before using it.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'drivers/usb/dwc3/ep0.c')
| -rw-r--r-- | drivers/usb/dwc3/ep0.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c index 803ba51..977d6d4 100644 --- a/drivers/usb/dwc3/ep0.c +++ b/drivers/usb/dwc3/ep0.c @@ -74,6 +74,9 @@ static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum, dma_addr_t buf_dma, | DWC3_TRB_CTRL_IOC | DWC3_TRB_CTRL_ISP_IMI); + dwc3_flush_cache((int)buf_dma, len); + dwc3_flush_cache((int)trb, sizeof(*trb)); + memset(¶ms, 0, sizeof(params)); params.param0 = upper_32_bits(dwc->ep0_trb_addr); params.param1 = lower_32_bits(dwc->ep0_trb_addr); @@ -774,6 +777,8 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc, if (!r) return; + dwc3_flush_cache((int)trb, sizeof(*trb)); + status = DWC3_TRB_SIZE_TRBSTS(trb->size); if (status == DWC3_TRBSTS_SETUP_PENDING) { dev_dbg(dwc->dev, "Setup Pending received"); @@ -795,6 +800,7 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc, transfer_size += (maxp - (transfer_size % maxp)); transferred = min_t(u32, ur->length, transfer_size - length); + dwc3_flush_cache((int)dwc->ep0_bounce, DWC3_EP0_BOUNCE_SIZE); memcpy(ur->buf, dwc->ep0_bounce, transferred); } else { transferred = ur->length - length; |