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authoreric.gao@rock-chips.com <eric.gao@rock-chips.com>2017-06-19 06:45:36 (GMT)
committerPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2017-07-11 10:13:47 (GMT)
commite3ef41df480f5c0da2d3d40ec2207e210bd34419 (patch)
tree5572c7970c6cb7d95c45fba101a6c4218119d425 /drivers/video
parent419b08012a09f2656c44c81d976ffa41926f5e6b (diff)
downloadu-boot-fsl-qoriq-e3ef41df480f5c0da2d3d40ec2207e210bd34419.tar.xz
rockchip: pwm: fix the register layout for the PWM controller
According to rk3288 spec, the pwm register order is: PWM_PWM0_CNT, PWM_PWM0_PERIOD_HPR, PWM_PWM0_DUTY_LPR, PWM_PWM0_CTRL but the source code's order is: struct rk3288_pwm { u32 cnt; u32 duty_lpr; u32 period_hpr; u32 ctrl; }; So, correct it here. It is the same as RK3399. Signed-off-by: Eric Gao <eric.gao@rock-chips.com> Edited the commit message: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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