diff options
author | Stephen Warren <swarren@nvidia.com> | 2014-07-01 17:41:15 (GMT) |
---|---|---|
committer | Marek Vasut <marex@denx.de> | 2014-07-02 13:45:38 (GMT) |
commit | 06b38fcbae9294d337578d583309f99de12a0d23 (patch) | |
tree | a3e8afc9cc30278cfde7c2184093c372c5c8cc23 /drivers | |
parent | 8d7c39d3e8ad43dab3158220f3347186e6f1aa66 (diff) | |
download | u-boot-fsl-qoriq-06b38fcbae9294d337578d583309f99de12a0d23.tar.xz |
usb: ci_udc: lift ilist size calculations to global scope
This will allow functions other than ci_udc_probe() to make use of the
constants in a future change.
This in turn requires converting the const int variables to #defines,
since the initialization of one global const int can't depend on the
value of another const int; the compiler thinks it's non-constant if
that dependency exists.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/usb/gadget/ci_udc.c | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c index 4115cd5..3a114cf 100644 --- a/drivers/usb/gadget/ci_udc.c +++ b/drivers/usb/gadget/ci_udc.c @@ -34,6 +34,17 @@ #error This driver can not work on systems with caches longer than 128b #endif +/* + * Each qTD item must be 32-byte aligned, each qTD touple must be + * cacheline aligned. There are two qTD items for each endpoint and + * only one of them is used for the endpoint at time, so we can group + * them together. + */ +#define ILIST_ALIGN roundup(ARCH_DMA_MINALIGN, 32) +#define ILIST_ENT_RAW_SZ (2 * sizeof(struct ept_queue_item)) +#define ILIST_ENT_SZ roundup(ILIST_ENT_RAW_SZ, ARCH_DMA_MINALIGN) +#define ILIST_SZ (NUM_ENDPOINTS * ILIST_ENT_SZ) + #ifndef DEBUG #define DBG(x...) do {} while (0) #else @@ -786,29 +797,18 @@ static int ci_udc_probe(void) const int eplist_raw_sz = num * sizeof(struct ept_queue_head); const int eplist_sz = roundup(eplist_raw_sz, ARCH_DMA_MINALIGN); - const int ilist_align = roundup(ARCH_DMA_MINALIGN, 32); - const int ilist_ent_raw_sz = 2 * sizeof(struct ept_queue_item); - const int ilist_ent_sz = roundup(ilist_ent_raw_sz, ARCH_DMA_MINALIGN); - const int ilist_sz = NUM_ENDPOINTS * ilist_ent_sz; - /* The QH list must be aligned to 4096 bytes. */ controller.epts = memalign(eplist_align, eplist_sz); if (!controller.epts) return -ENOMEM; memset(controller.epts, 0, eplist_sz); - /* - * Each qTD item must be 32-byte aligned, each qTD touple must be - * cacheline aligned. There are two qTD items for each endpoint and - * only one of them is used for the endpoint at time, so we can group - * them together. - */ - controller.items_mem = memalign(ilist_align, ilist_sz); + controller.items_mem = memalign(ILIST_ALIGN, ILIST_SZ); if (!controller.items_mem) { free(controller.epts); return -ENOMEM; } - memset(controller.items_mem, 0, ilist_sz); + memset(controller.items_mem, 0, ILIST_SZ); for (i = 0; i < 2 * NUM_ENDPOINTS; i++) { /* @@ -828,7 +828,7 @@ static int ci_udc_probe(void) head->next = TERMINATE; head->info = 0; - imem = controller.items_mem + ((i >> 1) * ilist_ent_sz); + imem = controller.items_mem + ((i >> 1) * ILIST_ENT_SZ); if (i & 1) imem += sizeof(struct ept_queue_item); |