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author | Kenth Eriksson <kenth.eriksson@transmode.com> | 2012-07-12 19:59:44 (GMT) |
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committer | Wolfgang Denk <wd@denx.de> | 2012-08-10 21:46:54 (GMT) |
commit | 8fde2f3a95c555903b54249f6d7ccab859ee2d6f (patch) | |
tree | 3528f701521f666e299c6fcb2ab8a506ea7bc96f /drivers | |
parent | a4ff471970e8f749dc16643ee7e354a3fcfa2ad7 (diff) | |
download | u-boot-fsl-qoriq-8fde2f3a95c555903b54249f6d7ccab859ee2d6f.tar.xz |
Add support for DS1388.
Support for DS1388 is added by extending the DS1337 driver. DS1388 is
similar to DS1337. The time registers are offset by 1 (due to support
for hundreds of seconds), and there is no century bit.
The configuration and trickle charge registers are also different.
Tested on hardware with Freescale P2010 and DS1388.
Signed-off-by: Kenth Eriksson <kenth.eriksson@transmode.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/rtc/Makefile | 1 | ||||
-rw-r--r-- | drivers/rtc/ds1337.c | 26 |
2 files changed, 27 insertions, 0 deletions
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index faf4fcd..9cfdbf9 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -38,6 +38,7 @@ COBJS-$(CONFIG_RTC_DS1307) += ds1307.o COBJS-$(CONFIG_RTC_DS1338) += ds1307.o COBJS-$(CONFIG_RTC_DS1337) += ds1337.o COBJS-$(CONFIG_RTC_DS1374) += ds1374.o +COBJS-$(CONFIG_RTC_DS1388) += ds1337.o COBJS-$(CONFIG_RTC_DS1556) += ds1556.o COBJS-$(CONFIG_RTC_DS164x) += ds164x.o COBJS-$(CONFIG_RTC_DS174x) += ds174x.o diff --git a/drivers/rtc/ds1337.c b/drivers/rtc/ds1337.c index 5bb9f94..4c98732 100644 --- a/drivers/rtc/ds1337.c +++ b/drivers/rtc/ds1337.c @@ -37,6 +37,7 @@ /* * RTC register addresses */ +#if defined CONFIG_RTC_DS1337 #define RTC_SEC_REG_ADDR 0x0 #define RTC_MIN_REG_ADDR 0x1 #define RTC_HR_REG_ADDR 0x2 @@ -47,6 +48,18 @@ #define RTC_CTL_REG_ADDR 0x0e #define RTC_STAT_REG_ADDR 0x0f #define RTC_TC_REG_ADDR 0x10 +#elif defined CONFIG_RTC_DS1388 +#define RTC_SEC_REG_ADDR 0x1 +#define RTC_MIN_REG_ADDR 0x2 +#define RTC_HR_REG_ADDR 0x3 +#define RTC_DAY_REG_ADDR 0x4 +#define RTC_DATE_REG_ADDR 0x5 +#define RTC_MON_REG_ADDR 0x6 +#define RTC_YR_REG_ADDR 0x7 +#define RTC_CTL_REG_ADDR 0x0c +#define RTC_STAT_REG_ADDR 0x0b +#define RTC_TC_REG_ADDR 0x0a +#endif /* * RTC control register bits @@ -87,6 +100,11 @@ int rtc_get (struct rtc_time *tmp) mon_cent = rtc_read (RTC_MON_REG_ADDR); year = rtc_read (RTC_YR_REG_ADDR); + /* No century bit, assume year 2000 */ +#ifdef CONFIG_RTC_DS1388 + mon_cent |= 0x80; +#endif + debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x " "hr: %02x min: %02x sec: %02x control: %02x status: %02x\n", year, mon_cent, mday, wday, hour, min, sec, control, status); @@ -151,6 +169,7 @@ int rtc_set (struct rtc_time *tmp) * 600 nA to 2uA. Define CONFIG_SYS_RTC_DS1337_NOOSC if you wish to turn * off the OSC output. */ + #ifdef CONFIG_SYS_RTC_DS1337_NOOSC #define RTC_DS1337_RESET_VAL \ (RTC_CTL_BIT_INTCN | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2) @@ -159,10 +178,17 @@ int rtc_set (struct rtc_time *tmp) #endif void rtc_reset (void) { +#ifdef CONFIG_SYS_RTC_DS1337 rtc_write (RTC_CTL_REG_ADDR, RTC_DS1337_RESET_VAL); +#elif defined CONFIG_SYS_RTC_DS1388 + rtc_write(RTC_CTL_REG_ADDR, 0x0); /* hw default */ +#endif #ifdef CONFIG_SYS_DS1339_TCR_VAL rtc_write (RTC_TC_REG_ADDR, CONFIG_SYS_DS1339_TCR_VAL); #endif +#ifdef CONFIG_SYS_DS1388_TCR_VAL + rtc_write(RTC_TC_REG_ADDR, CONFIG_SYS_DS1388_TCR_VAL); +#endif } |